From patchwork Thu Jan 12 07:20:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 42279 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp3749000wrt; Wed, 11 Jan 2023 23:48:39 -0800 (PST) X-Google-Smtp-Source: AMrXdXsz22QIlh3TteorVNJ2QBJcRRs1nDBnK+zk73AI48qO7B3uMc7t0mTht23qJdHFTCAb7in5 X-Received: by 2002:a17:906:3ec8:b0:846:cdd9:d23 with SMTP id d8-20020a1709063ec800b00846cdd90d23mr61013454ejj.19.1673509719095; Wed, 11 Jan 2023 23:48:39 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1673509719; cv=none; d=google.com; s=arc-20160816; b=NgaALDNXM2ZqO6ahHpbqwGQHytnfaODkzohN5WlwGhu9yYFs8DNmIOdKX+ynVl0mTX f/ljcIPJO3xioHw9LTlKQucDMLgL5j4GEYjOfUdlXtUaBJEB+/91AUApxOJh2e5cZgU8 fqect3lyQQc2dWjeW7aNV6b2TNdNC1vb3BowKFmFSAQdMQFsSwYncdl6E4ctw1TbXJ+z +l7/wfRPoC2jWqzRhbIO/MrcTeyeMykYlydHJmXAqp7kxfPwhk9VnILtKJ4A3pHvLCa4 IX0YuNDOv894qJFdJPphq5aX/d/Meen2ecMF5m92Bk3qe+QZZs4aeFU6Gi11eC4dU4ez UE7Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LJUfqOmPeIzPKldbkfIrg95BhrBRzuink1ZvFz2ArvQ=; b=bPTzpJBjpYYZCC75UXokujRWQWKZ51PUePCcMuSTtE7MCKy7EYMZ/zwWKOXkLLYyrp W+/0KIOwg4YUb+rf6KldccsF9DprRmtExFgZBBli7pbL4GCQK3ub54E2mQ0l+ZXAgM07 5nbvxdwvKam2LMDiGiqt4eD9py9nkvdncu4ZgWsT5T9iQl3qICKDXCrEEGcWS0IFTYsj cKbtxMEbbRZq5T4+aYgd+Du0XEI/MD361SyF2HHTftExf5smNZhenTwoh86nxEYcKNyz yso0gLGHs/Euuvy1jgNRivOBe2F8dEhQcAqU/jBIT+A7SoQ8yJipz0WTI0uOpoA7dD6P L3Wg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bJINky6+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id wy9-20020a170906fe0900b0084d3497942bsi15981097ejb.337.2023.01.11.23.48.15; Wed, 11 Jan 2023 23:48:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=bJINky6+; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239360AbjALHom (ORCPT + 99 others); Thu, 12 Jan 2023 02:44:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238848AbjALHoZ (ORCPT ); Thu, 12 Jan 2023 02:44:25 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5D8B340C0B for ; Wed, 11 Jan 2023 23:44:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1673509464; x=1705045464; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lER2iCdo4YT1z/t6Fjq+OdHUqkdAih3mri0JWVBf8do=; b=bJINky6+6hvaDsT2zUiUwzlGEFzJ2DeFbWe6ZvPy5pUGcy5FiOyaWH6B P/7PjoFH8BJSomIasfy2b8RHLvlDrbAKKQoSwrUaOFHPKSxe2W18DnfY7 1WUIRonKiIq/SfZCdlJjVIYboNt+AE4tZ5EQpkKUa79Rum5D88mMrljd/ +AZ2wFhSlwGKGe9kOC8Q97VRp10Nf0tBn9gCnBvzWJqJl1OASUyLoz93U XjegEYJYmsFjBMJ+4nG5Iwnb2NATTbKBPXekbb6iVklDH5BucLETW1Mhy n9qE7rM9Zdxa+mOfdsthlabMxAZc1XZi+AMpUM/NNvQkNDeC+l55ucG/s w==; X-IronPort-AV: E=McAfee;i="6500,9779,10586"; a="321328706" X-IronPort-AV: E=Sophos;i="5.96,319,1665471600"; d="scan'208";a="321328706" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jan 2023 23:44:23 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10586"; a="635283985" X-IronPort-AV: E=Sophos;i="5.96,319,1665471600"; d="scan'208";a="635283985" Received: from unknown (HELO fred..) ([172.25.112.68]) by orsmga006.jf.intel.com with ESMTP; 11 Jan 2023 23:44:22 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org, brgerst@gmail.com, chang.seok.bae@intel.com, jgross@suse.com Subject: [PATCH v6 4/5] x86/gsseg: move load_gs_index() to its own new header file Date: Wed, 11 Jan 2023 23:20:31 -0800 Message-Id: <20230112072032.35626-5-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230112072032.35626-1-xin3.li@intel.com> References: <20230112072032.35626-1-xin3.li@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754802127308308560?= X-GMAIL-MSGID: =?utf-8?q?1754802127308308560?= From: "H. Peter Anvin (Intel)" GS is a special segment on x86_64, move load_gs_index() to its own new header file to simplify header inclusion. Signed-off-by: H. Peter Anvin (Intel) Signed-off-by: Xin Li --- arch/x86/include/asm/gsseg.h | 41 ++++++++++++++++++++++++++++ arch/x86/include/asm/mmu_context.h | 1 + arch/x86/include/asm/special_insns.h | 21 -------------- arch/x86/kernel/paravirt.c | 1 + arch/x86/kernel/signal_32.c | 1 + arch/x86/kernel/tls.c | 1 + 6 files changed, 45 insertions(+), 21 deletions(-) create mode 100644 arch/x86/include/asm/gsseg.h diff --git a/arch/x86/include/asm/gsseg.h b/arch/x86/include/asm/gsseg.h new file mode 100644 index 000000000000..d15577c39e8d --- /dev/null +++ b/arch/x86/include/asm/gsseg.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef _ASM_X86_GSSEG_H +#define _ASM_X86_GSSEG_H + +#include + +#include +#include +#include +#include +#include + +#ifdef CONFIG_X86_64 + +extern asmlinkage void asm_load_gs_index(u16 selector); + +static inline void native_load_gs_index(unsigned int selector) +{ + unsigned long flags; + + local_irq_save(flags); + asm_load_gs_index(selector); + local_irq_restore(flags); +} + +#endif /* CONFIG_X86_64 */ + +#ifndef CONFIG_PARAVIRT_XXL + +static inline void load_gs_index(unsigned int selector) +{ +#ifdef CONFIG_X86_64 + native_load_gs_index(selector); +#else + loadsegment(gs, selector); +#endif +} + +#endif /* CONFIG_PARAVIRT_XXL */ + +#endif /* _ASM_X86_GSSEG_H */ diff --git a/arch/x86/include/asm/mmu_context.h b/arch/x86/include/asm/mmu_context.h index b8d40ddeab00..e01aa74a6de7 100644 --- a/arch/x86/include/asm/mmu_context.h +++ b/arch/x86/include/asm/mmu_context.h @@ -12,6 +12,7 @@ #include #include #include +#include extern atomic64_t last_mm_ctx_id; diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h index a71d0e8d4684..cfd9499b617c 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -120,17 +120,6 @@ static inline void native_wbinvd(void) asm volatile("wbinvd": : :"memory"); } -extern asmlinkage void asm_load_gs_index(u16 selector); - -static inline void native_load_gs_index(unsigned int selector) -{ - unsigned long flags; - - local_irq_save(flags); - asm_load_gs_index(selector); - local_irq_restore(flags); -} - static inline unsigned long __read_cr4(void) { return native_read_cr4(); @@ -184,16 +173,6 @@ static inline void wbinvd(void) native_wbinvd(); } - -static inline void load_gs_index(unsigned int selector) -{ -#ifdef CONFIG_X86_64 - native_load_gs_index(selector); -#else - loadsegment(gs, selector); -#endif -} - #endif /* CONFIG_PARAVIRT_XXL */ static inline void clflush(volatile void *__p) diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 327757afb027..bdc886c3f13a 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -32,6 +32,7 @@ #include #include #include +#include /* * nop stub, which must not clobber anything *including the stack* to diff --git a/arch/x86/kernel/signal_32.c b/arch/x86/kernel/signal_32.c index 2553136cf39b..bb4f3f3b1c84 100644 --- a/arch/x86/kernel/signal_32.c +++ b/arch/x86/kernel/signal_32.c @@ -31,6 +31,7 @@ #include #include #include +#include #ifdef CONFIG_IA32_EMULATION #include diff --git a/arch/x86/kernel/tls.c b/arch/x86/kernel/tls.c index 3c883e064242..3ffbab0081f4 100644 --- a/arch/x86/kernel/tls.c +++ b/arch/x86/kernel/tls.c @@ -12,6 +12,7 @@ #include #include #include +#include #include "tls.h"