From patchwork Thu Jan 5 20:12:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 39791 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp479471wrt; Thu, 5 Jan 2023 12:18:51 -0800 (PST) X-Google-Smtp-Source: AMrXdXt2QJRioH09iXJdw1YRi+iQxqZFN96xp1oiUyiptyEOo44NylW32dDhgW2hNOr1okBMcuol X-Received: by 2002:a17:903:10c:b0:192:5838:afaa with SMTP id y12-20020a170903010c00b001925838afaamr48340205plc.25.1672949931449; Thu, 05 Jan 2023 12:18:51 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672949931; cv=none; d=google.com; s=arc-20160816; b=KfzmwzYWaoMfDlj2hKp6oqfeiob0odBaPdIw9G13BWyLjWjPUHe9d4HzbOArGAeTab J4MUmj45tZPK7tjFT7VwO4p+6/x/mGCYVwm7SURkdmcAoMLP+mAHZIC2uNJmFmT0AyKy aFKtZgvWC+u6kXIKNmztlFR5IVdK4KxaMCo/EaYFGszfHMNVOMZT+ncW/5aJGvhHB42s tfGGJZeleD2Chl1IdO7C9fW25ksgGBgLRIF1D7Q/Guj9+PUxDVmcRxcE70nLpVP4/f1p MyXuITfen04Hw1TKu0E/p5WDaqh+/+tGQXER+q4xME7df8x4NmQFaX4/7rB8Ik/Bytom RqaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=yzwCUozT6xTSBtJK4ooGgCRLgmwGsuLttXQXEjllDLc=; b=p9K5i+BvNI5+bqYz7q1FbSu5vaMAvP0M17vJOHP0519rQx7TxsEAed59nideJwjpej HVdW2QxAKKYAWiKpdo31dowWkqc1tMzyryxwdKoktktBAzB7bu7yKAk9dyhF1vAirw8c FPl5n7fjQeKa5iKvKo7VgyFk9VcbbRDWoItde0terwWLeZvCUA9YfRVe2sErjkSfBMmi CfSBTNlX8kdQV2W3Ew1pIUSVRjuRNmeknOYdoQeRP7MJoJv+iM8pvoWUTDHsqKdTajU1 zzpWIXzGzlqIIkmljxXrsAnP801JECiGkDuVz0nXgeKNFcyMq5tYV1bj/d1b5PTBoAmw Yaxg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id i13-20020a170902c94d00b00176b26d519dsi42739742pla.350.2023.01.05.12.18.38; Thu, 05 Jan 2023 12:18:51 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235674AbjAEUNF (ORCPT + 99 others); Thu, 5 Jan 2023 15:13:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235653AbjAEUM7 (ORCPT ); Thu, 5 Jan 2023 15:12:59 -0500 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5F07E1A071; Thu, 5 Jan 2023 12:12:57 -0800 (PST) X-IronPort-AV: E=Sophos;i="5.96,303,1665414000"; d="scan'208";a="148288700" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie6.idc.renesas.com with ESMTP; 06 Jan 2023 05:12:56 +0900 Received: from mulinux.example.org (unknown [10.226.92.64]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id 63B09400515A; Fri, 6 Jan 2023 05:12:51 +0900 (JST) From: Fabrizio Castro To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Sebastian Reichel , Geert Uytterhoeven Cc: Fabrizio Castro , Lee Jones , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Chris Paterson , Biju Das , linux-renesas-soc@vger.kernel.org, Laurent Pinchart , Jacopo Mondi , Rob Herring Subject: [PATCH v4 1/2] dt-bindings: mfd: Add RZ/V2M PWC Date: Thu, 5 Jan 2023 20:12:41 +0000 Message-Id: <20230105201242.189195-2-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230105201242.189195-1-fabrizio.castro.jz@renesas.com> References: <20230105201242.189195-1-fabrizio.castro.jz@renesas.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754215147056249159?= X-GMAIL-MSGID: =?utf-8?q?1754215147056249159?= The Renesas RZ/V2M External Power Sequence Controller (PWC) IP is a multi-function device, and it's capable of: * external power supply on/off sequence generation * on/off signal generation for the LPDDR4 core power supply (LPVDD) * key input signals processing * general-purpose output pins Add the corresponding dt-bindings. Signed-off-by: Fabrizio Castro Reviewed-by: Rob Herring --- v1->v2: I have dropped syscon, simple-mfd, regmap, offset, and the child nodes. v2->v3: No change. v3->v4: Moved file under Documentation/devicetree/bindings/soc/renesas, and changed $id accordingly. Rob, I have kept your Reviewed-by tag assuming you are still happy, please do jump in if you think that's not appropriate anymore. .../soc/renesas/renesas,rzv2m-pwc.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml diff --git a/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml b/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml new file mode 100644 index 000000000000..12df33f58484 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/renesas/renesas,rzv2m-pwc.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/renesas/renesas,rzv2m-pwc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/V2M External Power Sequence Controller (PWC) + +description: |+ + The PWC IP found in the RZ/V2M family of chips comes with the below + capabilities + - external power supply on/off sequence generation + - on/off signal generation for the LPDDR4 core power supply (LPVDD) + - key input signals processing + - general-purpose output pins + +maintainers: + - Fabrizio Castro + +properties: + compatible: + items: + - enum: + - renesas,r9a09g011-pwc # RZ/V2M + - renesas,r9a09g055-pwc # RZ/V2MA + - const: renesas,rzv2m-pwc + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + renesas,rzv2m-pwc-power: + description: The PWC is used to control the system power supplies. + type: boolean + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + +additionalProperties: false + +examples: + - | + pwc: pwc@a3700000 { + compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc"; + reg = <0xa3700000 0x800>; + gpio-controller; + #gpio-cells = <2>; + renesas,rzv2m-pwc-power; + };