From patchwork Thu Jan 5 17:07:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Schneider-Pargmann X-Patchwork-Id: 39713 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp411003wrt; Thu, 5 Jan 2023 09:25:32 -0800 (PST) X-Google-Smtp-Source: AMrXdXvS0wbpk8Nlfp+XlZO34rzSqQ9DXMF2zfdlfsZ59UId5tyXW6yJFtWdLAAPDvIDd39Tb5Xe X-Received: by 2002:a05:6402:6c7:b0:492:609a:f144 with SMTP id n7-20020a05640206c700b00492609af144mr2695318edy.6.1672939532624; Thu, 05 Jan 2023 09:25:32 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1672939532; cv=none; d=google.com; s=arc-20160816; b=LDmUEMo1XpDEud715b07z/AEscFzbTqH64Kcu1NE9MJcNr/LrQOBZpyzY2lkLibLXA rPd1VaSlJZOGvVkiGjiltJuBuboRA+2p4RFg+LCf3VxOJppkb/9kML8tQjMVZqOIXkGn uHZEWNakVUu98zg3KkUWV2Zrw+/VrQ1llzwjfzw1yLvot/9DEwvGjo65HS2qnjfegCG0 +L2oSGrCYXCuTgZjU1gGpXElbBRLB/kB4thf+gi7ZTmf0sX+BxZknyzMTY5b2DBWqPpv my6rltp6AxFXQtanJm4QxZ/Ckfa8JQGfYg8TlyUAyBvalj7sZWVCh6XxdlSWB7TuRiSh 9VbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vP64e5b9ohPWmtQISJdT6ZMeITPgHiIqXiaeBFbmRb0=; b=AvT6ToGhf66B5lzP8vmox1hqOLc+QpYoP4U58GrP+x1LpJBz2QZvxpCiA8l0lhsJDf 7JuIKFZUqGkq07UZiDysaUHc65m4jGiNFm+bWnjoKWL1FLNuW8ufichmkcFxWQumQPh2 xooyDEHOO0Ul00hbQ89Sxd5GYYuuau5sMxFtle5bw3wZOjN5NNmWJmgo8866OUB+oIxf FopU5RjU7M0UA0DTxF3w9rGPpGvgqt1GbNW+Ph+NUhozVtkD3FdJafTQWukI1tCvMdWE NBn2K3MeR/+bpzbI9C5c6rxV6DSfgt5M1IMicnAJNUexzzXJ1ZMT7A86nYU6OFgUiFk/ hjGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=eCNMHDOa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g5-20020a056402428500b0048e1008c744si10691843edc.147.2023.01.05.09.25.09; Thu, 05 Jan 2023 09:25:32 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=eCNMHDOa; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235058AbjAERPf (ORCPT + 99 others); Thu, 5 Jan 2023 12:15:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34414 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235277AbjAEROb (ORCPT ); Thu, 5 Jan 2023 12:14:31 -0500 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7641463D04 for ; Thu, 5 Jan 2023 09:08:52 -0800 (PST) Received: by mail-wr1-x436.google.com with SMTP id r2so1949523wrv.7 for ; Thu, 05 Jan 2023 09:08:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vP64e5b9ohPWmtQISJdT6ZMeITPgHiIqXiaeBFbmRb0=; b=eCNMHDOaWZVSQxYE+JmQV8tG4HWDvxojEViLcY7wJRhQzMqsxDtzFgrjlujeERKhEJ K0R+BPVOcnmZJN/RtFEVPnktuxHBcDaWQFKZjnQc9SiYGXl050ITes6RIuDXKQvovVsx cQLSaMVucd2bHrRVTvYJXc51FFdbtJjUMmUBO5enk1YjPGB41+VRZeiayZVAjQN4P7MV 4vXCOG2iTMFbLNZwUX6bethu+JxTW4TqemawA2IosX5KXyVrFxR+/KDGM5hbpwXU8iFt RUdriaIDnqvhqMXPjviX6VExdGwnWGyJKKpnrXqdALfTL8unN3/nibCPRyzkxe7qbeI1 ns7Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vP64e5b9ohPWmtQISJdT6ZMeITPgHiIqXiaeBFbmRb0=; b=KkWHv7aC6uM3CNvo6jF8ANnnQerqCZw8ZQy9q76SGhWg72xLpytsxd9qLafKDOCDjG cBzXGnxyd9yafWQxeTFnFBDCxJf3QyretTCRFaoWioPwXmNnl+pAoeUECPf+EQ+ghVci EiyeOC8ASdKC+KEugcPNng1bC0GsWqsW8eraTLz5/i7oiHyh3E0sriceZzzbbbp5iFvH SBFQXEFwAO8/HiVwoQ8ryVcOSZGKL+bWHnF8r1J19GEk6atdvktC2S7hvUHV7ql1duGc tomofxEG8QCcmaQbaDFwObBcwxuA46Dzykkfh7TG5AXEnd8P7d+L0I8v/wfBDJLIUQgj pv+A== X-Gm-Message-State: AFqh2kriRFBMM19ZXP4lRmJho/3CuXYXOJ5T1cRszTdwsI38OkvdvWEH paaUTyLtH8g15QyDDI8jJJe+8A== X-Received: by 2002:a05:6000:242:b0:27f:aa94:a9f2 with SMTP id m2-20020a056000024200b0027faa94a9f2mr23955810wrz.68.1672938475251; Thu, 05 Jan 2023 09:07:55 -0800 (PST) Received: from blmsp.fritz.box ([2001:4091:a245:805c:9cf4:fdb8:bb61:5f4e]) by smtp.gmail.com with ESMTPSA id f14-20020adfe90e000000b002365730eae8sm37164853wrm.55.2023.01.05.09.07.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Jan 2023 09:07:54 -0800 (PST) From: Markus Schneider-Pargmann To: Rob Herring , Krzysztof Kozlowski , Matthias Brugger Cc: Chun-Jie Chen , AngeloGioacchino Del Regno , Fabien Parent , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, Fabien Parent , Markus Schneider-Pargmann Subject: [PATCH 8/8] soc: mediatek: pm-domains: Add support for MT8365 Date: Thu, 5 Jan 2023 18:07:35 +0100 Message-Id: <20230105170735.1637416-9-msp@baylibre.com> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230105170735.1637416-1-msp@baylibre.com> References: <20230105170735.1637416-1-msp@baylibre.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1754204243139111786?= X-GMAIL-MSGID: =?utf-8?q?1754204243139111786?= From: Fabien Parent Add the needed board data to support MT8365 SoC. Signed-off-by: Fabien Parent Signed-off-by: Markus Schneider-Pargmann --- drivers/soc/mediatek/mt8365-pm-domains.h | 147 +++++++++++++++++++++++ drivers/soc/mediatek/mtk-pm-domains.c | 5 + 2 files changed, 152 insertions(+) create mode 100644 drivers/soc/mediatek/mt8365-pm-domains.h diff --git a/drivers/soc/mediatek/mt8365-pm-domains.h b/drivers/soc/mediatek/mt8365-pm-domains.h new file mode 100644 index 000000000000..8735e833b15b --- /dev/null +++ b/drivers/soc/mediatek/mt8365-pm-domains.h @@ -0,0 +1,147 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __SOC_MEDIATEK_MT8365_PM_DOMAINS_H +#define __SOC_MEDIATEK_MT8365_PM_DOMAINS_H + +#include "mtk-pm-domains.h" +#include + +/* + * MT8365 power domain support + */ + +static const struct scpsys_domain_data scpsys_domain_data_mt8365[] = { + [MT8365_POWER_DOMAIN_MM] = { + .name = "mm", + .sta_mask = PWR_STATUS_DISP, + .ctl_offs = 0x30c, + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .caps = MTK_SCPD_STRICT_BUS_PROTECTION | MTK_SCPD_HAS_WAY_EN, + .bp_infracfg = { + BUS_PROT_WR(BIT(16) | BIT(17), 0x2a8, 0x2ac, 0x258), + BUS_PROT_WR(BIT(1) | BIT(2) | BIT(10) | BIT(11), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WAY_EN(BIT(6), 0x200, BIT(24), 0x0), + BUS_PROT_WAY_EN(BIT(5), 0x234, BIT(14), 0x28), + BUS_PROT_WR(BIT(6), 0x2a0, 0x2a4, 0x228), + }, + }, + [MT8365_POWER_DOMAIN_VENC] = { + .name = "venc", + .sta_mask = PWR_STATUS_VENC, + .ctl_offs = 0x0304, + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_smi = { + BUS_PROT_WR(BIT(1), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_AUDIO] = { + .name = "audio", + .sta_mask = PWR_STATUS_AUDIO, + .ctl_offs = 0x0314, + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184, + .sram_pdn_bits = GENMASK(12, 8), + .sram_pdn_ack_bits = GENMASK(17, 13), + .bp_infracfg = { + BUS_PROT_WR(BIT(27) | BIT(28), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP, + }, + [MT8365_POWER_DOMAIN_CONN] = { + .name = "conn", + .sta_mask = PWR_STATUS_CONN, + .ctl_offs = 0x032c, + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184, + .sram_pdn_bits = 0, + .sram_pdn_ack_bits = 0, + .bp_infracfg = { + BUS_PROT_WR(BIT(13), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(18), 0x2a8, 0x2ac, 0x258), + BUS_PROT_WR(BIT(14), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(21), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP | MTK_SCPD_KEEP_DEFAULT_OFF, + }, + [MT8365_POWER_DOMAIN_MFG] = { + .name = "mfg", + .sta_mask = PWR_STATUS_MFG, + .ctl_offs = 0x0338, + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(25), 0x2a0, 0x2a4, 0x228), + BUS_PROT_WR(BIT(21) | BIT(22), 0x2a0, 0x2a4, 0x228), + }, + }, + [MT8365_POWER_DOMAIN_CAM] = { + .name = "cam", + .sta_mask = BIT(25), + .ctl_offs = 0x0344, + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184, + .sram_pdn_bits = GENMASK(9, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(19), 0x2a8, 0x2ac, 0x258), + }, + .bp_smi = { + BUS_PROT_WR(BIT(2), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_VDEC] = { + .name = "vdec", + .sta_mask = BIT(31), + .ctl_offs = 0x0370, + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + .bp_smi = { + BUS_PROT_WR(BIT(3), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_APU] = { + .name = "apu", + .sta_mask = BIT(16), + .ctl_offs = 0x0378, + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184, + .sram_pdn_bits = GENMASK(14, 8), + .sram_pdn_ack_bits = GENMASK(21, 15), + .bp_infracfg = { + BUS_PROT_WR(BIT(2) | BIT(20), 0x2a8, 0x2ac, 0x258), + }, + .bp_smi = { + BUS_PROT_WR(BIT(4), 0x3c4, 0x3c8, 0x3c0), + }, + }, + [MT8365_POWER_DOMAIN_DSP] = { + .name = "dsp", + .sta_mask = BIT(17), + .ctl_offs = 0x037C, + .pwr_sta_offs = 0x0180, + .pwr_sta2nd_offs = 0x0184, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + .bp_infracfg = { + BUS_PROT_WR(BIT(24) | BIT(30) | BIT(31), 0x2a8, 0x2ac, 0x258), + }, + .caps = MTK_SCPD_ACTIVE_WAKEUP, + }, +}; + +static const struct scpsys_soc_data mt8365_scpsys_data = { + .domains_data = scpsys_domain_data_mt8365, + .num_domains = ARRAY_SIZE(scpsys_domain_data_mt8365), +}; + +#endif /* __SOC_MEDIATEK_MT8365_PM_DOMAINS_H */ diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c index 29a9028dd9b3..adb7716df0a8 100644 --- a/drivers/soc/mediatek/mtk-pm-domains.c +++ b/drivers/soc/mediatek/mtk-pm-domains.c @@ -23,6 +23,7 @@ #include "mt8186-pm-domains.h" #include "mt8192-pm-domains.h" #include "mt8195-pm-domains.h" +#include "mt8365-pm-domains.h" #define MTK_POLL_DELAY_US 10 #define MTK_POLL_TIMEOUT USEC_PER_SEC @@ -647,6 +648,10 @@ static const struct of_device_id scpsys_of_match[] = { .compatible = "mediatek,mt8195-power-controller", .data = &mt8195_scpsys_data, }, + { + .compatible = "mediatek,mt8365-power-controller", + .data = &mt8365_scpsys_data, + }, { } };