[v4,01/10] dt-bindings: qcom,*-geni: move #{address,size}-cells on i2c/spi nodes
Commit Message
Move the #address-cells and #size-cells properties on the existing
i2c/spi example nodes below the reg property so that all of the
address-related properties are grouped together.
Signed-off-by: Brian Masney <bmasney@redhat.com>
Link: https://lore.kernel.org/lkml/Y6Wnh+tXPhF6aC1b@hovoldconsulting.com/
---
New patch introduced in v4
.../devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml | 4 ++--
.../devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 4 ++--
.../devicetree/bindings/spi/qcom,spi-geni-qcom.yaml | 8 ++++----
3 files changed, 8 insertions(+), 8 deletions(-)
Comments
On Tue, 03 Jan 2023 13:22:20 -0500, Brian Masney wrote:
> Move the #address-cells and #size-cells properties on the existing
> i2c/spi example nodes below the reg property so that all of the
> address-related properties are grouped together.
>
> Signed-off-by: Brian Masney <bmasney@redhat.com>
> Link: https://lore.kernel.org/lkml/Y6Wnh+tXPhF6aC1b@hovoldconsulting.com/
> ---
> New patch introduced in v4
>
> .../devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml | 4 ++--
> .../devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 4 ++--
> .../devicetree/bindings/spi/qcom,spi-geni-qcom.yaml | 8 ++++----
> 3 files changed, 8 insertions(+), 8 deletions(-)
>
Acked-by: Rob Herring <robh@kernel.org>
On 03/01/2023 19:22, Brian Masney wrote:
> Move the #address-cells and #size-cells properties on the existing
> i2c/spi example nodes below the reg property so that all of the
> address-related properties are grouped together.
>
> Signed-off-by: Brian Masney <bmasney@redhat.com>
> Link: https://lore.kernel.org/lkml/Y6Wnh+tXPhF6aC1b@hovoldconsulting.com/
We do not have conclusion where these should be, so don't make any changes.
https://github.com/konradybcio-work/dt_review
Best regards,
Krzysztof
On Tue, Jan 10, 2023 at 11:41:14AM +0100, Krzysztof Kozlowski wrote:
> On 03/01/2023 19:22, Brian Masney wrote:
> > Move the #address-cells and #size-cells properties on the existing
> > i2c/spi example nodes below the reg property so that all of the
> > address-related properties are grouped together.
> >
> > Signed-off-by: Brian Masney <bmasney@redhat.com>
> > Link: https://lore.kernel.org/lkml/Y6Wnh+tXPhF6aC1b@hovoldconsulting.com/
>
> We do not have conclusion where these should be, so don't make any changes.
>
> https://github.com/konradybcio-work/dt_review
OK, let's just drop patches 1 and 2 in this series then. Patches 3-10
should be ready for merge.
Brian
@@ -127,13 +127,13 @@ examples:
i2c@88000 {
compatible = "qcom,geni-i2c";
reg = <0x00880000 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_i2c0_default>;
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>;
@@ -137,14 +137,14 @@ examples:
i2c0: i2c@a94000 {
compatible = "qcom,geni-i2c";
reg = <0 0xa94000 0 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qup_1_i2c_5_active>;
pinctrl-1 = <&qup_1_i2c_5_sleep>;
- #address-cells = <1>;
- #size-cells = <0>;
};
uart0: serial@a88000 {
@@ -85,13 +85,13 @@ examples:
spi@880000 {
compatible = "qcom,geni-spi";
reg = <0x00880000 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_spi0_default>;
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
power-domains = <&rpmhpd SC7180_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
@@ -105,6 +105,8 @@ examples:
spi@884000 {
compatible = "qcom,geni-spi";
reg = <0x00884000 0x4000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
@@ -113,6 +115,4 @@ examples:
pinctrl-names = "default";
pinctrl-0 = <&qup_spi1_default>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
- #address-cells = <1>;
- #size-cells = <0>;
};