[06/14] drm/panel-boe-bf060y8m-aj0: Drop custom DSI write macro

Message ID 20221228014757.3170486-7-javierm@redhat.com
State New
Headers
Series drm/panel: Make panel drivers use existing DSI write macros |

Commit Message

Javier Martinez Canillas Dec. 28, 2022, 1:47 a.m. UTC
  There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
that instead and delete the custom DSI write macro defined in the driver.

Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
---

 .../gpu/drm/panel/panel-boe-bf060y8m-aj0.c    | 28 +++++++------------
 1 file changed, 10 insertions(+), 18 deletions(-)
  

Comments

Sam Ravnborg Jan. 2, 2023, 6:45 p.m. UTC | #1
Hi Javier,

On Wed, Dec 28, 2022 at 02:47:49AM +0100, Javier Martinez Canillas wrote:
> There is a macro for this already in the <drm/drm_mipi_dsi.h> header, use
> that instead and delete the custom DSI write macro defined in the driver.
> 
> Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
> ---
> 
>  .../gpu/drm/panel/panel-boe-bf060y8m-aj0.c    | 28 +++++++------------
>  1 file changed, 10 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
> index ad58840eda41..7fff89cb1cd3 100644
> --- a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
> +++ b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
> @@ -43,14 +43,6 @@ struct boe_bf060y8m_aj0 *to_boe_bf060y8m_aj0(struct drm_panel *panel)
>  	return container_of(panel, struct boe_bf060y8m_aj0, panel);
>  }
>  
> -#define dsi_dcs_write_seq(dsi, seq...) do {				\
> -		static const u8 d[] = { seq };				\
> -		int ret;						\
> -		ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d));	\
> -		if (ret < 0)						\
> -			return ret;					\
> -	} while (0)
> -
>  static void boe_bf060y8m_aj0_reset(struct boe_bf060y8m_aj0 *boe)
>  {
>  	gpiod_set_value_cansleep(boe->reset_gpio, 0);
> @@ -67,11 +59,11 @@ static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe)
>  	struct device *dev = &dsi->dev;
>  	int ret;
>  
> -	dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
> -	dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c);
> -	dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10);
> -	dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE);
> -	dsi_dcs_write_seq(dsi, 0xf8,
> +	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
> +	mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c);
> +	mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10);
> +	mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE);
> +	mipi_dsi_dcs_write_seq(dsi, 0xf8,
>  			  0x00, 0x08, 0x10, 0x00, 0x22, 0x00, 0x00, 0x2d);
Fix indent.
With this fixed in all places:
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
>  
>  	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
> @@ -81,17 +73,17 @@ static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe)
>  	}
>  	msleep(30);
>  
> -	dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
> -	dsi_dcs_write_seq(dsi, 0xc0,
> +	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
> +	mipi_dsi_dcs_write_seq(dsi, 0xc0,
>  			  0x08, 0x48, 0x65, 0x33, 0x33, 0x33,
>  			  0x2a, 0x31, 0x39, 0x20, 0x09);
> -	dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f,
> +	mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f,
>  			  0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f,
>  			  0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
> -	dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92,
> +	mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92,
>  			  0x4f, 0x8f, 0x44, 0x84, 0x83, 0x83, 0x83,
>  			  0x5c, 0x5c, 0x5c);
> -	dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e);
> +	mipi_dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e);
>  
>  	msleep(30);
>  
> -- 
> 2.38.1
  

Patch

diff --git a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
index ad58840eda41..7fff89cb1cd3 100644
--- a/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
+++ b/drivers/gpu/drm/panel/panel-boe-bf060y8m-aj0.c
@@ -43,14 +43,6 @@  struct boe_bf060y8m_aj0 *to_boe_bf060y8m_aj0(struct drm_panel *panel)
 	return container_of(panel, struct boe_bf060y8m_aj0, panel);
 }
 
-#define dsi_dcs_write_seq(dsi, seq...) do {				\
-		static const u8 d[] = { seq };				\
-		int ret;						\
-		ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d));	\
-		if (ret < 0)						\
-			return ret;					\
-	} while (0)
-
 static void boe_bf060y8m_aj0_reset(struct boe_bf060y8m_aj0 *boe)
 {
 	gpiod_set_value_cansleep(boe->reset_gpio, 0);
@@ -67,11 +59,11 @@  static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe)
 	struct device *dev = &dsi->dev;
 	int ret;
 
-	dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
-	dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c);
-	dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10);
-	dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE);
-	dsi_dcs_write_seq(dsi, 0xf8,
+	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x4c);
+	mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_3D_CONTROL, 0x10);
+	mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_POWER_SAVE, DCS_ALLOW_HBM_RANGE);
+	mipi_dsi_dcs_write_seq(dsi, 0xf8,
 			  0x00, 0x08, 0x10, 0x00, 0x22, 0x00, 0x00, 0x2d);
 
 	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
@@ -81,17 +73,17 @@  static int boe_bf060y8m_aj0_on(struct boe_bf060y8m_aj0 *boe)
 	}
 	msleep(30);
 
-	dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
-	dsi_dcs_write_seq(dsi, 0xc0,
+	mipi_dsi_dcs_write_seq(dsi, 0xb0, 0xa5, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, 0xc0,
 			  0x08, 0x48, 0x65, 0x33, 0x33, 0x33,
 			  0x2a, 0x31, 0x39, 0x20, 0x09);
-	dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f,
+	mipi_dsi_dcs_write_seq(dsi, 0xc1, 0x00, 0x00, 0x00, 0x1f, 0x1f,
 			  0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f,
 			  0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f);
-	dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92,
+	mipi_dsi_dcs_write_seq(dsi, 0xe2, 0x20, 0x04, 0x10, 0x12, 0x92,
 			  0x4f, 0x8f, 0x44, 0x84, 0x83, 0x83, 0x83,
 			  0x5c, 0x5c, 0x5c);
-	dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e);
+	mipi_dsi_dcs_write_seq(dsi, 0xde, 0x01, 0x2c, 0x00, 0x77, 0x3e);
 
 	msleep(30);