diff mbox series

[v1,10/10] memory: tegra: make cluster bw request a multiple of mc_channels

Message ID 20221220160240.27494-11-sumitg@nvidia.com
State New
Headers
Series Tegra234 Memory interconnect support |

Commit Message

Sumit Gupta Dec. 20, 2022, 4:02 p.m. UTC 
  CPU opp table have bandwidth data per MC channel. The actual bandwidth
depends on number of MC channels which can change as per the boot config
for a board. So, multiply the bandwidth request for CPU clusters with
number of enabled MC channels. This is not required to be done for other
MC clients.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
---
 drivers/memory/tegra/tegra234.c | 25 ++++++++++++++++++++++++-
 1 file changed, 24 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/memory/tegra/tegra234.c b/drivers/memory/tegra/tegra234.c
index 82ce6c3c3eb0..a45fc99b9c82 100644
--- a/drivers/memory/tegra/tegra234.c
+++ b/drivers/memory/tegra/tegra234.c
@@ -834,6 +834,29 @@  static int tegra234_mc_icc_set(struct icc_node *src, struct icc_node *dst)
 	return 0;
 }
 
+static int tegra234_mc_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw,
+				     u32 peak_bw, u32 *agg_avg, u32 *agg_peak)
+{
+	struct tegra_icc_node *tnode = NULL;
+	struct tegra_mc *mc = NULL;
+
+	if (node->id == TEGRA_ICC_MC_CPU_CLUSTER0 ||
+	    node->id == TEGRA_ICC_MC_CPU_CLUSTER1 ||
+	    node->id == TEGRA_ICC_MC_CPU_CLUSTER2) {
+		if (node->data) {
+			tnode = node->data;
+			mc = tnode->mc;
+			if (mc)
+				peak_bw = peak_bw * mc->num_channels;
+		}
+	}
+
+	*agg_avg += avg_bw;
+	*agg_peak = max(*agg_peak, peak_bw);
+
+	return 0;
+}
+
 static struct icc_node*
 tegra234_mc_of_icc_xlate(struct of_phandle_args *spec, void *data)
 {
@@ -866,7 +889,7 @@  static int tegra234_mc_icc_get_init_bw(struct icc_node *node, u32 *avg, u32 *pea
 static const struct tegra_mc_icc_ops tegra234_mc_icc_ops = {
 	.xlate = tegra234_mc_of_icc_xlate,
 	.get_bw = tegra234_mc_icc_get_init_bw,
-	.aggregate = icc_std_aggregate,
+	.aggregate = tegra234_mc_icc_aggregate,
 	.set = tegra234_mc_icc_set,
 };