diff mbox series

[v3,11/11] reset: starfive: Add StarFive JH7110 reset driver

Message ID 20221220005054.34518-12-hal.feng@starfivetech.com
State New
Headers
Series Basic clock and reset support for StarFive JH7110 RISC-V SoC |

Commit Message

Hal Feng Dec. 20, 2022, 12:50 a.m. UTC 
  Add auxiliary driver to support StarFive JH7110 system
and always-on resets.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
---
 drivers/reset/starfive/Kconfig                |  8 +++
 drivers/reset/starfive/Makefile               |  1 +
 .../reset/starfive/reset-starfive-jh7110.c    | 64 +++++++++++++++++++
 .../reset/starfive/reset-starfive-jh71x0.h    |  6 ++
 4 files changed, 79 insertions(+)
 create mode 100644 drivers/reset/starfive/reset-starfive-jh7110.c

Comments

kernel test robot Dec. 20, 2022, 7:14 a.m. UTC | #1 
Hi Hal,

I love your patch! Perhaps something to improve:

[auto build test WARNING on 830b3c68c1fb1e9176028d02ef86f3cf76aa2476]

url:    https://github.com/intel-lab-lkp/linux/commits/Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
base:   830b3c68c1fb1e9176028d02ef86f3cf76aa2476
patch link:    https://lore.kernel.org/r/20221220005054.34518-12-hal.feng%40starfivetech.com
patch subject: [PATCH v3 11/11] reset: starfive: Add StarFive JH7110 reset driver
config: riscv-randconfig-r042-20221219
compiler: clang version 16.0.0 (https://github.com/llvm/llvm-project 98b13979fb05f3ed288a900deb843e7b27589e58)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install riscv cross compiling tool for clang build
        # apt-get install binutils-riscv64-linux-gnu
        # https://github.com/intel-lab-lkp/linux/commit/01106ff009ef6db1a17d842f97f5b0c2522a5e23
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
        git checkout 01106ff009ef6db1a17d842f97f5b0c2522a5e23
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash drivers/reset/starfive/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/reset/starfive/reset-starfive-jh71x0.c:105:5: warning: no previous prototype for function 'reset_starfive_jh71x0_register' [-Wmissing-prototypes]
   int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
       ^
   drivers/reset/starfive/reset-starfive-jh71x0.c:105:1: note: declare 'static' if the function is not intended to be used outside of this translation unit
   int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
   ^
   static 
   1 warning generated.


vim +/reset_starfive_jh71x0_register +105 drivers/reset/starfive/reset-starfive-jh71x0.c

b6a2a85ebf0ab4 Emil Renner Berthing 2022-12-20  104  
d3dcb30354b5f5 Emil Renner Berthing 2022-12-20 @105  int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
kernel test robot Dec. 23, 2022, 12:39 p.m. UTC | #2 
Hi Hal,

I love your patch! Perhaps something to improve:

[auto build test WARNING on 830b3c68c1fb1e9176028d02ef86f3cf76aa2476]

url:    https://github.com/intel-lab-lkp/linux/commits/Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
base:   830b3c68c1fb1e9176028d02ef86f3cf76aa2476
patch link:    https://lore.kernel.org/r/20221220005054.34518-12-hal.feng%40starfivetech.com
patch subject: [PATCH v3 11/11] reset: starfive: Add StarFive JH7110 reset driver
config: riscv-randconfig-s042-20221218
compiler: riscv64-linux-gcc (GCC) 12.1.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # apt-get install sparse
        # sparse version: v0.6.4-39-gce1a6720-dirty
        # https://github.com/intel-lab-lkp/linux/commit/01106ff009ef6db1a17d842f97f5b0c2522a5e23
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
        git checkout 01106ff009ef6db1a17d842f97f5b0c2522a5e23
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=riscv olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=riscv SHELL=/bin/bash drivers/reset/starfive/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

sparse warnings: (new ones prefixed by >>)
   WARNING: invalid argument to '-march': '_zihintpause'
>> drivers/reset/starfive/reset-starfive-jh7110.c:18:45: sparse: sparse: incorrect type in initializer (different address spaces) @@     expected void [noderef] __iomem *base @@     got void * @@
   drivers/reset/starfive/reset-starfive-jh7110.c:18:45: sparse:     expected void [noderef] __iomem *base
   drivers/reset/starfive/reset-starfive-jh7110.c:18:45: sparse:     got void *

vim +18 drivers/reset/starfive/reset-starfive-jh7110.c

    13	
    14	static int jh7110_reset_probe(struct auxiliary_device *adev,
    15				      const struct auxiliary_device_id *id)
    16	{
    17		struct reset_info *info = (struct reset_info *)(id->driver_data);
  > 18		void __iomem *base = dev_get_drvdata(adev->dev.parent);
    19	
    20		if (!info || !base)
    21			return -ENODEV;
    22	
    23		return reset_starfive_jh71x0_register(&adev->dev, adev->dev.parent->of_node,
    24						      base + info->assert_offset,
    25						      base + info->status_offset,
    26						      NULL,
    27						      info->nr_resets,
    28						      NULL);
    29	}
    30
kernel test robot Dec. 27, 2022, 7:20 p.m. UTC | #3 
Hi Hal,

I love your patch! Perhaps something to improve:

[auto build test WARNING on 830b3c68c1fb1e9176028d02ef86f3cf76aa2476]

url:    https://github.com/intel-lab-lkp/linux/commits/Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
base:   830b3c68c1fb1e9176028d02ef86f3cf76aa2476
patch link:    https://lore.kernel.org/r/20221220005054.34518-12-hal.feng%40starfivetech.com
patch subject: [PATCH v3 11/11] reset: starfive: Add StarFive JH7110 reset driver
config: riscv-randconfig-r042-20221226
compiler: riscv32-linux-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/intel-lab-lkp/linux/commit/01106ff009ef6db1a17d842f97f5b0c2522a5e23
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
        git checkout 01106ff009ef6db1a17d842f97f5b0c2522a5e23
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=riscv olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash drivers/reset/starfive/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

All warnings (new ones prefixed by >>):

>> drivers/reset/starfive/reset-starfive-jh71x0.c:105:5: warning: no previous prototype for 'reset_starfive_jh71x0_register' [-Wmissing-prototypes]
     105 | int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~


vim +/reset_starfive_jh71x0_register +105 drivers/reset/starfive/reset-starfive-jh71x0.c

b6a2a85ebf0ab4 Emil Renner Berthing 2022-12-20  104  
d3dcb30354b5f5 Emil Renner Berthing 2022-12-20 @105  int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
kernel test robot Jan. 5, 2023, 3:35 p.m. UTC | #4 
Hi Hal,

I love your patch! Perhaps something to improve:

[auto build test WARNING on 830b3c68c1fb1e9176028d02ef86f3cf76aa2476]

url:    https://github.com/intel-lab-lkp/linux/commits/Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
base:   830b3c68c1fb1e9176028d02ef86f3cf76aa2476
patch link:    https://lore.kernel.org/r/20221220005054.34518-12-hal.feng%40starfivetech.com
patch subject: [PATCH v3 11/11] reset: starfive: Add StarFive JH7110 reset driver
config: riscv-randconfig-s042-20230105
compiler: riscv64-linux-gcc (GCC) 12.1.0
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # apt-get install sparse
        # sparse version: v0.6.4-39-gce1a6720-dirty
        # https://github.com/intel-lab-lkp/linux/commit/01106ff009ef6db1a17d842f97f5b0c2522a5e23
        git remote add linux-review https://github.com/intel-lab-lkp/linux
        git fetch --no-tags linux-review Hal-Feng/Basic-clock-and-reset-support-for-StarFive-JH7110-RISC-V-SoC/20221220-090131
        git checkout 01106ff009ef6db1a17d842f97f5b0c2522a5e23
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=riscv olddefconfig
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-12.1.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' O=build_dir ARCH=riscv SHELL=/bin/bash drivers/reset/starfive/

If you fix the issue, kindly add following tag where applicable
| Reported-by: kernel test robot <lkp@intel.com>

sparse warnings: (new ones prefixed by >>)
   WARNING: invalid argument to '-march': '_zihintpause'
>> drivers/reset/starfive/reset-starfive-jh7110.c:18:45: sparse: sparse: incorrect type in initializer (different address spaces) @@     expected void [noderef] __iomem *base @@     got void * @@
   drivers/reset/starfive/reset-starfive-jh7110.c:18:45: sparse:     expected void [noderef] __iomem *base
   drivers/reset/starfive/reset-starfive-jh7110.c:18:45: sparse:     got void *

vim +18 drivers/reset/starfive/reset-starfive-jh7110.c

    13	
    14	static int jh7110_reset_probe(struct auxiliary_device *adev,
    15				      const struct auxiliary_device_id *id)
    16	{
    17		struct reset_info *info = (struct reset_info *)(id->driver_data);
  > 18		void __iomem *base = dev_get_drvdata(adev->dev.parent);
    19	
    20		if (!info || !base)
    21			return -ENODEV;
    22	
    23		return reset_starfive_jh71x0_register(&adev->dev, adev->dev.parent->of_node,
    24						      base + info->assert_offset,
    25						      base + info->status_offset,
    26						      NULL,
    27						      info->nr_resets,
    28						      NULL);
    29	}
    30
diff mbox series

Patch

diff --git a/drivers/reset/starfive/Kconfig b/drivers/reset/starfive/Kconfig
index 9d15c4110e40..fab1a081af17 100644
--- a/drivers/reset/starfive/Kconfig
+++ b/drivers/reset/starfive/Kconfig
@@ -10,3 +10,11 @@  config RESET_STARFIVE_JH7100
 	default SOC_STARFIVE
 	help
 	  This enables the reset controller driver for the StarFive JH7100 SoC.
+
+config RESET_STARFIVE_JH7110
+	bool "StarFive JH7110 Reset Driver"
+	depends on AUXILIARY_BUS && CLK_STARFIVE_JH7110_SYS
+	select RESET_STARFIVE_JH71X0
+	default CLK_STARFIVE_JH7110_SYS
+	help
+	  This enables the reset controller driver for the StarFive JH7110 SoC.
diff --git a/drivers/reset/starfive/Makefile b/drivers/reset/starfive/Makefile
index f6aa12466fad..7a44b66fb9d5 100644
--- a/drivers/reset/starfive/Makefile
+++ b/drivers/reset/starfive/Makefile
@@ -2,3 +2,4 @@ 
 obj-$(CONFIG_RESET_STARFIVE_JH71X0)		+= reset-starfive-jh71x0.o
 
 obj-$(CONFIG_RESET_STARFIVE_JH7100)		+= reset-starfive-jh7100.o
+obj-$(CONFIG_RESET_STARFIVE_JH7110)		+= reset-starfive-jh7110.o
diff --git a/drivers/reset/starfive/reset-starfive-jh7110.c b/drivers/reset/starfive/reset-starfive-jh7110.c
new file mode 100644
index 000000000000..74bbc79f86af
--- /dev/null
+++ b/drivers/reset/starfive/reset-starfive-jh7110.c
@@ -0,0 +1,64 @@ 
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Reset driver for the StarFive JH7110 SoC
+ *
+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
+ */
+
+#include <linux/auxiliary_bus.h>
+
+#include "reset-starfive-jh71x0.h"
+
+#include <dt-bindings/reset/starfive,jh7110-crg.h>
+
+static int jh7110_reset_probe(struct auxiliary_device *adev,
+			      const struct auxiliary_device_id *id)
+{
+	struct reset_info *info = (struct reset_info *)(id->driver_data);
+	void __iomem *base = dev_get_drvdata(adev->dev.parent);
+
+	if (!info || !base)
+		return -ENODEV;
+
+	return reset_starfive_jh71x0_register(&adev->dev, adev->dev.parent->of_node,
+					      base + info->assert_offset,
+					      base + info->status_offset,
+					      NULL,
+					      info->nr_resets,
+					      NULL);
+}
+
+static const struct reset_info jh7110_sys_info = {
+	.nr_resets = JH7110_SYSRST_END,
+	.assert_offset = 0x2F8,
+	.status_offset = 0x308,
+};
+
+static const struct reset_info jh7110_aon_info = {
+	.nr_resets = JH7110_AONRST_END,
+	.assert_offset = 0x38,
+	.status_offset = 0x3C,
+};
+
+static const struct auxiliary_device_id jh7110_reset_ids[] = {
+	{
+		.name = "clk_starfive_jh71x0.reset-sys",
+		.driver_data = (kernel_ulong_t)&jh7110_sys_info,
+	},
+	{
+		.name = "clk_starfive_jh71x0.reset-aon",
+		.driver_data = (kernel_ulong_t)&jh7110_aon_info,
+	},
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(auxiliary, jh7110_reset_ids);
+
+static struct auxiliary_driver jh7110_reset_driver = {
+	.probe		= jh7110_reset_probe,
+	.id_table	= jh7110_reset_ids,
+};
+module_auxiliary_driver(jh7110_reset_driver);
+
+MODULE_AUTHOR("Hal Feng <hal.feng@starfivetech.com>");
+MODULE_DESCRIPTION("StarFive JH7110 reset driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/reset/starfive/reset-starfive-jh71x0.h b/drivers/reset/starfive/reset-starfive-jh71x0.h
index db7d39a87f87..e485472e1adc 100644
--- a/drivers/reset/starfive/reset-starfive-jh71x0.h
+++ b/drivers/reset/starfive/reset-starfive-jh71x0.h
@@ -6,6 +6,12 @@ 
 #ifndef __RESET_STARFIVE_JH71X0_H
 #define __RESET_STARFIVE_JH71X0_H
 
+struct reset_info {
+	unsigned int nr_resets;
+	unsigned int assert_offset;
+	unsigned int status_offset;
+};
+
 int reset_starfive_jh71x0_register(struct device *dev, struct device_node *of_node,
 				   void __iomem *assert, void __iomem *status,
 				   const u32 *asserted, unsigned int nr_resets,