[1/2] arm64: dts: imx8mp: Fix missing GPC Interrupt

Message ID 20221217180849.775718-1-aford173@gmail.com
State New
Headers
Series [1/2] arm64: dts: imx8mp: Fix missing GPC Interrupt |

Commit Message

Adam Ford Dec. 17, 2022, 6:08 p.m. UTC
  The GPC node references an interrupt parent, but it doesn't
state the interrupt itself.  According to the TRM, this IRQ
is 87. This also eliminate an error detected from dt_binding_check

Fixes: fc0f05124621 ("arm64: dts: imx8mp: add GPC node with GPU power domains")
Signed-off-by: Adam Ford <aford173@gmail.com>
  

Comments

Laurent Pinchart Dec. 18, 2022, 3 p.m. UTC | #1
Hi Adam,

Thank you for the patch.

On Sat, Dec 17, 2022 at 12:08:48PM -0600, Adam Ford wrote:
> The GPC node references an interrupt parent, but it doesn't
> state the interrupt itself.  According to the TRM, this IRQ
> is 87. This also eliminate an error detected from dt_binding_check

The interrupt isn't used by the driver as far as I can see, so I can't
test this, but the patch matches the reference manual, so

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> Fixes: fc0f05124621 ("arm64: dts: imx8mp: add GPC node with GPU power domains")
> Signed-off-by: Adam Ford <aford173@gmail.com>
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index 7a6e6221f421..7a8ca56e48b6 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -524,6 +524,7 @@ gpc: gpc@303a0000 {
>  				compatible = "fsl,imx8mp-gpc";
>  				reg = <0x303a0000 0x1000>;
>  				interrupt-parent = <&gic>;
> +				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
>  				interrupt-controller;
>  				#interrupt-cells = <3>;
>
  
Adam Ford Dec. 18, 2022, 3:58 p.m. UTC | #2
On Sun, Dec 18, 2022 at 9:00 AM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Adam,
>
> Thank you for the patch.
>
> On Sat, Dec 17, 2022 at 12:08:48PM -0600, Adam Ford wrote:
> > The GPC node references an interrupt parent, but it doesn't
> > state the interrupt itself.  According to the TRM, this IRQ
> > is 87. This also eliminate an error detected from dt_binding_check
>
> The interrupt isn't used by the driver as far as I can see, so I can't
> test this, but the patch matches the reference manual, so

I don't think it changes functionality, but the other imx8m boards
have it, and 'make dtbs_check' showed it as missing.
Thanks for the review.

>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>
> > Fixes: fc0f05124621 ("arm64: dts: imx8mp: add GPC node with GPU power domains")
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 7a6e6221f421..7a8ca56e48b6 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -524,6 +524,7 @@ gpc: gpc@303a0000 {
> >                               compatible = "fsl,imx8mp-gpc";
> >                               reg = <0x303a0000 0x1000>;
> >                               interrupt-parent = <&gic>;
> > +                             interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
> >                               interrupt-controller;
> >                               #interrupt-cells = <3>;
> >
>
> --
> Regards,
>
> Laurent Pinchart
  
Shawn Guo Jan. 1, 2023, 3:37 a.m. UTC | #3
On Sat, Dec 17, 2022 at 12:08:48PM -0600, Adam Ford wrote:
> The GPC node references an interrupt parent, but it doesn't
> state the interrupt itself.  According to the TRM, this IRQ
> is 87. This also eliminate an error detected from dt_binding_check
> 
> Fixes: fc0f05124621 ("arm64: dts: imx8mp: add GPC node with GPU power domains")
> Signed-off-by: Adam Ford <aford173@gmail.com>

Applied both, thanks!
  

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 7a6e6221f421..7a8ca56e48b6 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -524,6 +524,7 @@  gpc: gpc@303a0000 {
 				compatible = "fsl,imx8mp-gpc";
 				reg = <0x303a0000 0x1000>;
 				interrupt-parent = <&gic>;
+				interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
 				interrupt-controller;
 				#interrupt-cells = <3>;