From patchwork Thu Dec 15 15:02:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hugo Villeneuve X-Patchwork-Id: 33678 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp421371wrn; Thu, 15 Dec 2022 07:20:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf4qo/mdk292TpTJy4eyRSAKQ275iqk84jzPLtZ/G6fLvpKED9lEpe1bgthLkmuFpOx387LC X-Received: by 2002:a17:90a:ebc6:b0:212:f14b:9c3f with SMTP id cf6-20020a17090aebc600b00212f14b9c3fmr29202152pjb.25.1671117599851; Thu, 15 Dec 2022 07:19:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1671117599; cv=none; d=google.com; s=arc-20160816; b=fwRbu63BN7cFmsmGc1Zq4f3Mxu/Vs3xz/kIymxNAHb6dy01orwjsikgkWu+fRgyPMG KTQZVu1K/sgf+XRjlljpYyrdJX6YGbAuJGzRKgCRP3pjn2cgfZBo2++QoRKJpuCzKjQ8 /Ptlk0TdW1hH9odeWAZHdVatsCW67Wxdup6qa8Whhjwhf4Ht4JuxFnXLysbBfp5mBbuc stKOThE7lRSvZV/xhcZFflwM4qwpDRI+9zNTvHojbK1qCa9Y6e1jYHIhPG04krsg4Hzp 7jWK9PJPwTAEY/h/EzCrP7gCQ3vIUJEhiyCqRULxnWqyY3wYo2iRI40MqIavr7niFxPF tSNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:subject:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:cc:to:from:dkim-signature; bh=2TpvNPjJv8dDj4S0AWy3RhL4BnpJx4K5ru1eHBA0knE=; b=CBNm6Zp+Vv88GapO3RFCMmBQA34dMiIiUI0BtOVhOpf/nIBaWcGoCqepmfK2xAzPbD PK+ECXnVxoRW1ViY8cEZeQCyIwxp5AnxU1jl1GZF4v4G+YMf5c8ebxeZ9djKKrnKBpYI nzORqEpiYe/XB+9lNIZYL8n3p8VEtdaklZum0qsXunIip/+lBA2DXAu26hH5bfo5W2/z Mf1HAK3KI7u0pnEJwC+94XNMw+vLDMmVwYzG/xhL14fZdgCRBORueWBF/7V9XTVf3bLU iO/betCmH2FRDO41AopWlsfZut/Q7KkpyC6D/K3r/Hlg9ltPJM5C2b64qn/HJJpHG5Zm VQoA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@hugovil.com header.s=x header.b="nZX7/Wto"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id n19-20020a63ee53000000b004788ec9cfdasi3112495pgk.71.2022.12.15.07.19.42; Thu, 15 Dec 2022 07:19:59 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@hugovil.com header.s=x header.b="nZX7/Wto"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230030AbiLOPST (ORCPT + 99 others); Thu, 15 Dec 2022 10:18:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46032 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229785AbiLOPSJ (ORCPT ); Thu, 15 Dec 2022 10:18:09 -0500 Received: from mail.hugovil.com (mail.hugovil.com [162.243.120.170]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 78DDCC41; Thu, 15 Dec 2022 07:18:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=hugovil.com ; s=x; h=Subject:Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=2TpvNPjJv8dDj4S0AWy3RhL4BnpJx4K5ru1eHBA0knE=; b=nZX7/WtofBUQQYU1kqwXQ6pVSe MY0Eo2yc67aJ00XNJu439CNUbx5xEs5iRsubdpJMEu6APpfIFv06RYNDpczor9MaQeV7DvrpRg9CK Lp788Li4ccE5ErB7xKkvXaPqS5k9BJUXgKpm2eTxZzH9GLqSEDohqTJaENE4m/5tG/aY=; Received: from modemcable168.174-80-70.mc.videotron.ca ([70.80.174.168]:48102 helo=pettiford.lan) by mail.hugovil.com with esmtpa (Exim 4.92) (envelope-from ) id 1p5pmQ-0000EC-3I; Thu, 15 Dec 2022 10:04:14 -0500 From: Hugo Villeneuve To: a.zummo@towertech.it, alexandre.belloni@bootlin.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, hugo@hugovil.com, Hugo Villeneuve Date: Thu, 15 Dec 2022 10:02:14 -0500 Message-Id: <20221215150214.1109074-14-hugo@hugovil.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221215150214.1109074-1-hugo@hugovil.com> References: <20221215150214.1109074-1-hugo@hugovil.com> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 70.80.174.168 X-SA-Exim-Mail-From: hugo@hugovil.com X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 Subject: [PATCH v3 13/14] rtc: pcf2127: add flag for watchdog register value read support X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.hugovil.com) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752293808400506177?= X-GMAIL-MSGID: =?utf-8?q?1752293808400506177?= From: Hugo Villeneuve The watchdog value register cannot be read on the PCF2131 after being set. Add a new flag to identify which variant has read access to this register, and use this flag to selectively test if watchdog timer was started by bootloader. Signed-off-by: Hugo Villeneuve Reviewed-by: Bruno Thomsen --- drivers/rtc/rtc-pcf2127.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c index 3fd2fee4978b..1d2b5c9e6757 100644 --- a/drivers/rtc/rtc-pcf2127.c +++ b/drivers/rtc/rtc-pcf2127.c @@ -214,6 +214,7 @@ struct pcf21xx_config { int max_register; unsigned int has_nvmem:1; unsigned int has_bit_wd_ctl_cd0:1; + unsigned int wd_val_reg_readable:1; /* If watchdog value register can be read. */ unsigned int has_int_a_b:1; /* PCF2131 supports two interrupt outputs. */ unsigned int has_reset_reg:1; /* If variant has a reset register. */ u8 regs_td_base; /* Time/data base registers. */ @@ -511,7 +512,6 @@ static const struct watchdog_ops pcf2127_watchdog_ops = { static int pcf2127_watchdog_init(struct device *dev, struct pcf2127 *pcf2127) { - u32 wdd_timeout; int ret; if (!IS_ENABLED(CONFIG_WATCHDOG) || @@ -539,12 +539,17 @@ static int pcf2127_watchdog_init(struct device *dev, struct pcf2127 *pcf2127) watchdog_set_drvdata(&pcf2127->wdd, pcf2127); /* Test if watchdog timer is started by bootloader */ - ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_wd_val, &wdd_timeout); - if (ret) - return ret; + if (pcf2127->cfg->wd_val_reg_readable) { + u32 wdd_timeout; + + ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_wd_val, + &wdd_timeout); + if (ret) + return ret; - if (wdd_timeout) - set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status); + if (wdd_timeout) + set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status); + } return devm_watchdog_register_device(dev, &pcf2127->wdd); } @@ -953,6 +958,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = { .max_register = 0x1d, .has_nvmem = 1, .has_bit_wd_ctl_cd0 = 1, + .wd_val_reg_readable = 1, .has_int_a_b = 0, .has_reset_reg = 0, .regs_td_base = PCF2127_REG_TIME_DATE_BASE, @@ -980,6 +986,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = { .max_register = 0x19, .has_nvmem = 0, .has_bit_wd_ctl_cd0 = 0, + .wd_val_reg_readable = 1, .has_int_a_b = 0, .has_reset_reg = 0, .regs_td_base = PCF2127_REG_TIME_DATE_BASE, @@ -1007,6 +1014,7 @@ static struct pcf21xx_config pcf21xx_cfg[] = { .max_register = 0x36, .has_nvmem = 0, .has_bit_wd_ctl_cd0 = 0, + .wd_val_reg_readable = 0, .has_int_a_b = 1, .has_reset_reg = 1, .regs_td_base = PCF2131_REG_TIME_DATE_BASE,