diff mbox series

[v3,09/14] rtc: pcf2127: set PWRMNG value for PCF2131

Message ID	20221215150214.1109074-10-hugo@hugovil.com
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; From: Hugo Villeneuve <hugo@hugovil.com> To: a.zummo@towertech.it, alexandre.belloni@bootlin.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org Cc: linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, hugo@hugovil.com, Hugo Villeneuve <hvilleneuve@dimonoff.com> Date: Thu, 15 Dec 2022 10:02:10 -0500 Message-Id: <20221215150214.1109074-10-hugo@hugovil.com> In-Reply-To: <20221215150214.1109074-1-hugo@hugovil.com> References: <20221215150214.1109074-1-hugo@hugovil.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [PATCH v3 09/14] rtc: pcf2127: set PWRMNG value for PCF2131 Precedence: bulk
Series	rtc: pcf2127: add PCF2131 driver \| [v3,00/14] rtc: pcf2127: add PCF2131 driver [v3,01/14] rtc: pcf2127: add variant-specific configuration structure [v3,02/14] rtc: pcf2127: adapt for time/date registers at any offset [v3,03/14] rtc: pcf2127: adapt for alarm registers at any offset [v3,04/14] rtc: pcf2127: adapt for WD registers at any offset [v3,05/14] rtc: pcf2127: adapt for CLKOUT register at any offset [v3,06/14] rtc: pcf2127: add support for multiple TS functions [v3,07/14] rtc: pcf2127: add support for PCF2131 RTC [v3,08/14] rtc: pcf2127: add support for PCF2131 interrupts on output INT_A [v3,09/14] rtc: pcf2127: set PWRMNG value for PCF2131 [v3,10/14] rtc: pcf2127: read and validate PCF2131 device signature [v3,11/14] rtc: pcf2127: adapt time/date registers write sequence for PCF2131 [v3,12/14] rtc: pcf2127: support generic watchdog timing configuration [v3,13/14] rtc: pcf2127: add flag for watchdog register value read support [v3,14/14] dt-bindings: rtc: pcf2127: add PCF2131

Commit Message

Hugo Villeneuve Dec. 15, 2022, 3:02 p.m. UTC

  From: Hugo Villeneuve <hvilleneuve@dimonoff.com>

Default PWRMNG[2:0] bits are set to 000b for PCF2127/29, but to
111b for PCF2131.

Set these bits to 000b to select same mode as PCF2127/29.

Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
---
 drivers/rtc/rtc-pcf2127.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Bruno Thomsen Jan. 7, 2023, 6:36 p.m. UTC | #1

Den tor. 15. dec. 2022 kl. 16.19 skrev Hugo Villeneuve <hugo@hugovil.com>:
>
> From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
>
> Default PWRMNG[2:0] bits are set to 000b for PCF2127/29, but to
> 111b for PCF2131.
>
> Set these bits to 000b to select same mode as PCF2127/29.
>
> Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>

Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>

I think it's a good idea[1] but there have been concerns about
setting default values in the past[2]. In case somebody needs
a different behaviour they should add a device tree property.

[1] https://lore.kernel.org/linux-rtc/20190910143945.9364-1-bruno.thomsen@gmail.com/
[2] https://lore.kernel.org/linux-rtc/20191211163354.GC1463890@piout.net/

> ---
>  drivers/rtc/rtc-pcf2127.c | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>
> diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
> index 68af4d0438b8..241189ee4a05 100644
> --- a/drivers/rtc/rtc-pcf2127.c
> +++ b/drivers/rtc/rtc-pcf2127.c
> @@ -53,6 +53,7 @@
>  #define PCF2127_BIT_CTRL3_BLF                  BIT(2)
>  #define PCF2127_BIT_CTRL3_BF                   BIT(3)
>  #define PCF2127_BIT_CTRL3_BTSE                 BIT(4)
> +#define PCF2127_CTRL3_PWRMNG_MASK              GENMASK(7, 5)
>  /* Control register 4 */
>  #define PCF2131_REG_CTRL4              0x03
>  #define PCF2131_BIT_CTRL4_TSF4                 BIT(4)
> @@ -1129,6 +1130,20 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
>         regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
>                                 PCF2127_BIT_CTRL1_POR_OVRD);
>
> +       /* Make sure PWRMNG[2:0] is set to 000b. This is the default for
> +        * PCF2127/29, but not for PCF2131 (default of 111b).
> +        *
> +        * PWRMNG[2:0]  = 000b:
> +        *   battery switch-over function is enabled in standard mode;
> +        *   battery low detection function is enabled
> +        */
> +       ret = regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
> +                               PCF2127_CTRL3_PWRMNG_MASK);
> +       if (ret < 0) {
> +               dev_err(dev, "PWRMNG config failed\n");
> +               return ret;
> +       }
> +
>         ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_clkout, &val);
>         if (ret < 0)
>                 return ret;
> --
> 2.30.2
>

Alexandre Belloni Jan. 20, 2023, 4:39 p.m. UTC | #2

Hello,

On 07/01/2023 19:36:06+0100, Bruno Thomsen wrote:
> Den tor. 15. dec. 2022 kl. 16.19 skrev Hugo Villeneuve <hugo@hugovil.com>:
> >
> > From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> >
> > Default PWRMNG[2:0] bits are set to 000b for PCF2127/29, but to
> > 111b for PCF2131.
> >
> > Set these bits to 000b to select same mode as PCF2127/29.
> >
> > Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> 
> Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>
> 
> I think it's a good idea[1] but there have been concerns about
> setting default values in the past[2]. In case somebody needs
> a different behaviour they should add a device tree property.
> 
> [1] https://lore.kernel.org/linux-rtc/20190910143945.9364-1-bruno.thomsen@gmail.com/
> [2] https://lore.kernel.org/linux-rtc/20191211163354.GC1463890@piout.net/

I confirm this is still my point of view and I won't take this patch as
this may break existing users.

> 
> > ---
> >  drivers/rtc/rtc-pcf2127.c | 15 +++++++++++++++
> >  1 file changed, 15 insertions(+)
> >
> > diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
> > index 68af4d0438b8..241189ee4a05 100644
> > --- a/drivers/rtc/rtc-pcf2127.c
> > +++ b/drivers/rtc/rtc-pcf2127.c
> > @@ -53,6 +53,7 @@
> >  #define PCF2127_BIT_CTRL3_BLF                  BIT(2)
> >  #define PCF2127_BIT_CTRL3_BF                   BIT(3)
> >  #define PCF2127_BIT_CTRL3_BTSE                 BIT(4)
> > +#define PCF2127_CTRL3_PWRMNG_MASK              GENMASK(7, 5)
> >  /* Control register 4 */
> >  #define PCF2131_REG_CTRL4              0x03
> >  #define PCF2131_BIT_CTRL4_TSF4                 BIT(4)
> > @@ -1129,6 +1130,20 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
> >         regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
> >                                 PCF2127_BIT_CTRL1_POR_OVRD);
> >
> > +       /* Make sure PWRMNG[2:0] is set to 000b. This is the default for
> > +        * PCF2127/29, but not for PCF2131 (default of 111b).
> > +        *
> > +        * PWRMNG[2:0]  = 000b:
> > +        *   battery switch-over function is enabled in standard mode;
> > +        *   battery low detection function is enabled
> > +        */
> > +       ret = regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
> > +                               PCF2127_CTRL3_PWRMNG_MASK);
> > +       if (ret < 0) {
> > +               dev_err(dev, "PWRMNG config failed\n");
> > +               return ret;
> > +       }
> > +
> >         ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_clkout, &val);
> >         if (ret < 0)
> >                 return ret;
> > --
> > 2.30.2
> >

Hugo Villeneuve Jan. 23, 2023, 10:07 p.m. UTC | #3

On Fri, 20 Jan 2023 17:39:17 +0100
Alexandre Belloni <alexandre.belloni@bootlin.com> wrote:

> Hello,
> 
> On 07/01/2023 19:36:06+0100, Bruno Thomsen wrote:
> > Den tor. 15. dec. 2022 kl. 16.19 skrev Hugo Villeneuve <hugo@hugovil.com>:
> > >
> > > From: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> > >
> > > Default PWRMNG[2:0] bits are set to 000b for PCF2127/29, but to
> > > 111b for PCF2131.
> > >
> > > Set these bits to 000b to select same mode as PCF2127/29.
> > >
> > > Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
> > 
> > Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>
> > 
> > I think it's a good idea[1] but there have been concerns about
> > setting default values in the past[2]. In case somebody needs
> > a different behaviour they should add a device tree property.
> > 
> > [1] https://lore.kernel.org/linux-rtc/20190910143945.9364-1-bruno.thomsen@gmail.com/
> > [2] https://lore.kernel.org/linux-rtc/20191211163354.GC1463890@piout.net/
> 
> I confirm this is still my point of view and I won't take this patch as
> this may break existing users.

Patch dropped.

 
> > 
> > > ---
> > >  drivers/rtc/rtc-pcf2127.c | 15 +++++++++++++++
> > >  1 file changed, 15 insertions(+)
> > >
> > > diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
> > > index 68af4d0438b8..241189ee4a05 100644
> > > --- a/drivers/rtc/rtc-pcf2127.c
> > > +++ b/drivers/rtc/rtc-pcf2127.c
> > > @@ -53,6 +53,7 @@
> > >  #define PCF2127_BIT_CTRL3_BLF                  BIT(2)
> > >  #define PCF2127_BIT_CTRL3_BF                   BIT(3)
> > >  #define PCF2127_BIT_CTRL3_BTSE                 BIT(4)
> > > +#define PCF2127_CTRL3_PWRMNG_MASK              GENMASK(7, 5)
> > >  /* Control register 4 */
> > >  #define PCF2131_REG_CTRL4              0x03
> > >  #define PCF2131_BIT_CTRL4_TSF4                 BIT(4)
> > > @@ -1129,6 +1130,20 @@ static int pcf2127_probe(struct device *dev, struct regmap *regmap,
> > >         regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
> > >                                 PCF2127_BIT_CTRL1_POR_OVRD);
> > >
> > > +       /* Make sure PWRMNG[2:0] is set to 000b. This is the default for
> > > +        * PCF2127/29, but not for PCF2131 (default of 111b).
> > > +        *
> > > +        * PWRMNG[2:0]  = 000b:
> > > +        *   battery switch-over function is enabled in standard mode;
> > > +        *   battery low detection function is enabled
> > > +        */
> > > +       ret = regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
> > > +                               PCF2127_CTRL3_PWRMNG_MASK);
> > > +       if (ret < 0) {
> > > +               dev_err(dev, "PWRMNG config failed\n");
> > > +               return ret;
> > > +       }
> > > +
> > >         ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_clkout, &val);
> > >         if (ret < 0)
> > >                 return ret;
> > > --
> > > 2.30.2
> > >
> 
> -- 
> Alexandre Belloni, co-owner and COO, Bootlin
> Embedded Linux and Kernel engineering
> https://bootlin.com
>

diff mbox series

Patch

diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
index 68af4d0438b8..241189ee4a05 100644
--- a/drivers/rtc/rtc-pcf2127.c
+++ b/drivers/rtc/rtc-pcf2127.c
@@ -53,6 +53,7 @@ 
 #define PCF2127_BIT_CTRL3_BLF			BIT(2)
 #define PCF2127_BIT_CTRL3_BF			BIT(3)
 #define PCF2127_BIT_CTRL3_BTSE			BIT(4)
+#define PCF2127_CTRL3_PWRMNG_MASK		GENMASK(7, 5)
 /* Control register 4 */
 #define PCF2131_REG_CTRL4		0x03
 #define PCF2131_BIT_CTRL4_TSF4			BIT(4)
@@ -1129,6 +1130,20 @@  static int pcf2127_probe(struct device *dev, struct regmap *regmap,
 	regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL1,
 				PCF2127_BIT_CTRL1_POR_OVRD);
 
+	/* Make sure PWRMNG[2:0] is set to 000b. This is the default for
+	 * PCF2127/29, but not for PCF2131 (default of 111b).
+	 *
+	 * PWRMNG[2:0]  = 000b:
+	 *   battery switch-over function is enabled in standard mode;
+	 *   battery low detection function is enabled
+	 */
+	ret = regmap_clear_bits(pcf2127->regmap, PCF2127_REG_CTRL3,
+				PCF2127_CTRL3_PWRMNG_MASK);
+	if (ret < 0) {
+		dev_err(dev, "PWRMNG config failed\n");
+		return ret;
+	}
+
 	ret = regmap_read(pcf2127->regmap, pcf2127->cfg->reg_clkout, &val);
 	if (ret < 0)
 		return ret;