Message ID | 20221214131117.108008-2-angelogioacchino.delregno@collabora.com |
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State | New |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id xg5-20020a170907320500b007c0a9cff536si10829741ejb.510.2022.12.14.05.19.15; Wed, 14 Dec 2022 05:19:39 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=b8nGE4bf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238521AbiLNNMJ (ORCPT <rfc822;jeantsuru.cumc.mandola@gmail.com> + 99 others); Wed, 14 Dec 2022 08:12:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238577AbiLNNLr (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 14 Dec 2022 08:11:47 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 946CF21E18; Wed, 14 Dec 2022 05:11:33 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id C72106602C48; Wed, 14 Dec 2022 13:11:31 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1671023492; bh=QTKESx542e6FJD6rGcbgjaPumHHCtgmxbjfUwumu8oc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=b8nGE4bfc9ypr98vsy9szzGgqpXVzea10EFDG0sAJTxgBqgCNstIuI+X378rFF+d6 YDMmawKSys7soiqcRZpDkV+lbIsV80MR15a1X2rYiM2qTprBHZeedZyEOSBLmtcLCv 7Uhcc3vo0eT4H8DpN+5ejl/Wkeh9+2U0sbso+NpNBTIiy8/LJrf+bTAKVm0J6fikp2 mbeHCuCUp/tHNwWh6F5vwoybswV0YkKyIO865xsWv8xpIS4tWgMG/CjjhqN1miS6AB XNIQDSVIZMHN7GdCGTQ6TKsatkebbqYmAaosZBHGn8skt4HWKvBajJvuZ3j7o4G3OY xvxYmvUixEB4A== From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> To: matthias.bgg@gmail.com Cc: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, tinghan.shen@mediatek.com, weiyi.lu@mediatek.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Subject: [PATCH 2/2] arm64: dts: mediatek: mt8195: Add power domain to U3PHY1 T-PHY Date: Wed, 14 Dec 2022 14:11:17 +0100 Message-Id: <20221214131117.108008-2-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221214131117.108008-1-angelogioacchino.delregno@collabora.com> References: <20221214131117.108008-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752195640713685683?= X-GMAIL-MSGID: =?utf-8?q?1752195640713685683?= |
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[1/2] arm64: dts: mediatek: mt8195: Use P1 clocks for PCIe1 controller
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Commit Message
AngeloGioacchino Del Regno
Dec. 14, 2022, 1:11 p.m. UTC
Assign power domain to the U3PHY1 T-PHY in otder to keep this PHY
alive after unused PD shutdown and to be able to completely cut
and restore power to it, for example, to save some power during
system suspend/sleep.
Fixes: 2b515194bf0c ("arm64: dts: mt8195: Add power domains controller")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index e61944510b8e..131945c44dcc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -1549,6 +1549,7 @@ u3phy1: t-phy@11e30000 { #address-cells = <1>; #size-cells = <1>; ranges = <0 0 0x11e30000 0xe00>; + power-domains = <&spm MT8195_POWER_DOMAIN_SSUSB_PCIE_PHY>; status = "disabled"; u2port1: usb-phy@0 {