From patchwork Tue Dec 13 22:43:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabrizio Castro X-Patchwork-Id: 32960 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:e747:0:0:0:0:0 with SMTP id c7csp402118wrn; Tue, 13 Dec 2022 14:44:54 -0800 (PST) X-Google-Smtp-Source: AA0mqf4rf5TS3eTVHRUd8ng+RMBh9U04cTSrz1nE1QbgJL7rC3dwfq/pDzbMk51JcBqB9DU7NdqA X-Received: by 2002:a17:906:7ad8:b0:7c0:89ac:83f9 with SMTP id k24-20020a1709067ad800b007c089ac83f9mr18554656ejo.11.1670971494687; Tue, 13 Dec 2022 14:44:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670971494; cv=none; d=google.com; s=arc-20160816; b=krAwJ++CQb3KzQvItCiGQKmuFU/FHzFrCkaKx3wjohOAqxRkC2wlK4ikjxhWlvHCg0 ZJz6try1lSe6/mYK1odt5VoB7rer3z/sIZz5nwSfFkBsI3IyMEtD92PHumI92K5SSxkM 3iUUkTsVXQDqOvyOynDaYNjL28/Zv15i20jTfnm18VP1c9ZZ+lfK+PEJrg3ywI5GXfPo rusNZRT/d++W+DVvzLbp4cdU3K8kYoWfJ/4Yo8veCMGhwxejWUD3PBBP8C91fYxDXiOW /KaZGMsQcaGFyRxdYJgodYSdcr8MnhyXA3KY5c1MK8SuIVqeJ81Mlg+xfCU39hdUWbk+ hBng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=7WQAAE/FBe34e11gS5yHW2cgtOmw57hVs85bdX/tEhw=; b=tohDFLApMerOyHUAzJZVxcopcgvwyGBjm3cBVZjh2fdNnTp9FlyPfnSjwGcimRYoSW 5yELCDzwaoO675glT3VAUMtZTcmaU+dSsrQyq1T7HUkRtmLad/VYtjtR5DE4MQhEEVHj 0VxVN3Jb6wIw8W1QQUEC3JbJmsrmQm7r1P4DvPnBx/GitpqHf3TYhracwQfkYoB9YmFc QjQDvkGSQ1Nu2JebV+7+9lX9r2Wv5zA+O0Am3ezbAi/5lxTSV6SFwhZdZVFaOM3XZCSQ j6hoLL00jib76DDHSoo3xgf/QIy6IwL3r0BdrKffCJ/xfHMCsRZsAVul2Zkp3nUgxhO5 9geg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id wg14-20020a17090705ce00b0078d93245e34si10931324ejb.793.2022.12.13.14.44.31; Tue, 13 Dec 2022 14:44:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=renesas.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236739AbiLMWnn (ORCPT + 99 others); Tue, 13 Dec 2022 17:43:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236733AbiLMWnh (ORCPT ); Tue, 13 Dec 2022 17:43:37 -0500 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id DA98722292; Tue, 13 Dec 2022 14:43:35 -0800 (PST) X-IronPort-AV: E=Sophos;i="5.96,242,1665414000"; d="scan'208";a="143229837" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 14 Dec 2022 07:43:35 +0900 Received: from mulinux.home (unknown [10.226.93.1]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 819BB40F4527; Wed, 14 Dec 2022 07:43:30 +0900 (JST) From: Fabrizio Castro To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Sebastian Reichel , Geert Uytterhoeven Cc: Fabrizio Castro , Lee Jones , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Chris Paterson , Biju Das , linux-renesas-soc@vger.kernel.org, Laurent Pinchart , Jacopo Mondi Subject: [PATCH 3/5] dt-bindings: mfd: Add RZ/V2M PWC global registers bindings Date: Tue, 13 Dec 2022 22:43:08 +0000 Message-Id: <20221213224310.543243-4-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221213224310.543243-1-fabrizio.castro.jz@renesas.com> References: <20221213224310.543243-1-fabrizio.castro.jz@renesas.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1752140605836797502?= X-GMAIL-MSGID: =?utf-8?q?1752140605836797502?= The RZ/V2M PWC is a multi-function device, and its software support relies on "syscon" and "simple-mfd". Add the dt-bindings for the top level device tree node. Signed-off-by: Fabrizio Castro --- .../bindings/mfd/renesas,rzv2m-pwc.yaml | 70 +++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml diff --git a/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml new file mode 100644 index 000000000000..a7e180bfbd83 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/renesas,rzv2m-pwc.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/renesas,rzv2m-pwc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/V2M External Power Sequence Controller (PWC) + +description: |+ + The PWC IP found in the RZ/V2M family of chips comes with the below + capabilities + - external power supply on/off sequence generation + - on/off signal generation for the LPDDR4 core power supply (LPVDD) + - key input signals processing + - general-purpose output pins + +maintainers: + - Fabrizio Castro + +properties: + compatible: + items: + - enum: + - renesas,r9a09g011-pwc # RZ/V2M + - renesas,r9a09g055-pwc # RZ/V2MA + - const: renesas,rzv2m-pwc + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + gpio: + type: object + $ref: /schemas/gpio/renesas,rzv2m-pwc-gpio.yaml# + description: General-Purpose Output pins controller. + + poweroff: + type: object + $ref: /schemas/power/reset/renesas,rzv2m-pwc-poweroff.yaml# + description: Power OFF controller. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pwc: pwc@a3700000 { + compatible = "renesas,r9a09g011-pwc", "renesas,rzv2m-pwc", "syscon", + "simple-mfd"; + reg = <0xa3700000 0x800>; + + gpio { + compatible = "renesas,r9a09g011-pwc-gpio", + "renesas,rzv2m-pwc-gpio"; + regmap = <&pwc>; + offset = <0x80>; + gpio-controller; + #gpio-cells = <2>; + }; + + poweroff { + compatible = "renesas,r9a09g011-pwc-poweroff", + "renesas,rzv2m-pwc-poweroff"; + regmap = <&pwc>; + }; + };