Message ID | 20221212123311.146261-7-manivannan.sadhasivam@linaro.org |
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State | New |
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Series |
Qcom: LLCC/EDAC: Fix base address used for LLCC banks
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Commit Message
Manivannan Sadhasivam
Dec. 12, 2022, 12:33 p.m. UTC
The LLCC block has several banks each with a different base address
and holes in between. So it is not a correct approach to cover these
banks with a single offset/size. Instead, the individual bank's base
address needs to be specified in devicetree with the exact size.
Also, let's get rid of reg-names property as it is not needed anymore.
The driver is expected to parse the reg field based on index to get the
addresses of each LLCC banks.
Cc: <stable@vger.kernel.org> # 6.0
Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform")
Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
Comments
On 12/12/2022 6:03 PM, Manivannan Sadhasivam wrote: > The LLCC block has several banks each with a different base address > and holes in between. So it is not a correct approach to cover these > banks with a single offset/size. Instead, the individual bank's base > address needs to be specified in devicetree with the exact size. > > Also, let's get rid of reg-names property as it is not needed anymore. > The driver is expected to parse the reg field based on index to get the > addresses of each LLCC banks. > > Cc: <stable@vger.kernel.org> # 6.0 > Fixes: 152d1faf1e2f ("arm64: dts: qcom: add SC8280XP platform") > Reported-by: Parikshit Pareek <quic_ppareek@quicinc.com> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 7 +++++-- > 1 file changed, 5 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > index 109c9d2b684d..f8731cbccce9 100644 > --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi > @@ -1856,8 +1856,11 @@ opp-6 { > > system-cache-controller@9200000 { > compatible = "qcom,sc8280xp-llcc"; > - reg = <0 0x09200000 0 0x58000>, <0 0x09600000 0 0x58000>; > - reg-names = "llcc_base", "llcc_broadcast_base"; > + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, > + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, > + <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>, > + <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>, > + <0 0x09600000 0 0x58000>; > interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; > }; > Reviewed-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi index 109c9d2b684d..f8731cbccce9 100644 --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi @@ -1856,8 +1856,11 @@ opp-6 { system-cache-controller@9200000 { compatible = "qcom,sc8280xp-llcc"; - reg = <0 0x09200000 0 0x58000>, <0 0x09600000 0 0x58000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x58000>, <0 0x09280000 0 0x58000>, + <0 0x09300000 0 0x58000>, <0 0x09380000 0 0x58000>, + <0 0x09400000 0 0x58000>, <0 0x09480000 0 0x58000>, + <0 0x09500000 0 0x58000>, <0 0x09580000 0 0x58000>, + <0 0x09600000 0 0x58000>; interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>; };