[v2,1/6] arm64: dts: qcom: sc7180: order top-level nodes alphabetically
Commit Message
Order top-level nodes like memory, reserved-memory, opp-table-cpu
alphabetically for easier code maintenance. No functional change (same
dtx_diff).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Changes since v1:
1. New patch
---
arch/arm64/boot/dts/qcom/sc7180.dtsi | 144 +++++++++++++--------------
1 file changed, 72 insertions(+), 72 deletions(-)
Comments
On 12.12.2022 11:02, Krzysztof Kozlowski wrote:
> Order top-level nodes like memory, reserved-memory, opp-table-cpu
> alphabetically for easier code maintenance. No functional change (same
> dtx_diff).
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
>
> Changes since v1:
> 1. New patch
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 144 +++++++++++++--------------
> 1 file changed, 72 insertions(+), 72 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> index ea886cf08b4d..6d3e86ce2936 100644
> --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
> @@ -27,8 +27,6 @@ / {
> #address-cells = <2>;
> #size-cells = <2>;
>
> - chosen { };
> -
> aliases {
> mmc1 = &sdhc_1;
> mmc2 = &sdhc_2;
> @@ -54,6 +52,8 @@ aliases {
> spi11 = &spi11;
> };
>
> + chosen { };
> +
> clocks {
> xo_board: xo-board {
> compatible = "fixed-clock";
> @@ -68,62 +68,6 @@ sleep_clk: sleep-clk {
> };
> };
>
> - reserved_memory: reserved-memory {
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> -
> - hyp_mem: memory@80000000 {
> - reg = <0x0 0x80000000 0x0 0x600000>;
> - no-map;
> - };
> -
> - xbl_mem: memory@80600000 {
> - reg = <0x0 0x80600000 0x0 0x200000>;
> - no-map;
> - };
> -
> - aop_mem: memory@80800000 {
> - reg = <0x0 0x80800000 0x0 0x20000>;
> - no-map;
> - };
> -
> - aop_cmd_db_mem: memory@80820000 {
> - reg = <0x0 0x80820000 0x0 0x20000>;
> - compatible = "qcom,cmd-db";
> - no-map;
> - };
> -
> - sec_apps_mem: memory@808ff000 {
> - reg = <0x0 0x808ff000 0x0 0x1000>;
> - no-map;
> - };
> -
> - smem_mem: memory@80900000 {
> - reg = <0x0 0x80900000 0x0 0x200000>;
> - no-map;
> - };
> -
> - tz_mem: memory@80b00000 {
> - reg = <0x0 0x80b00000 0x0 0x3900000>;
> - no-map;
> - };
> -
> - ipa_fw_mem: memory@8b700000 {
> - reg = <0 0x8b700000 0 0x10000>;
> - no-map;
> - };
> -
> - rmtfs_mem: memory@94600000 {
> - compatible = "qcom,rmtfs-mem";
> - reg = <0x0 0x94600000 0x0 0x200000>;
> - no-map;
> -
> - qcom,client-id = <1>;
> - qcom,vmid = <15>;
> - };
> - };
> -
> cpus {
> #address-cells = <2>;
> #size-cells = <0>;
> @@ -398,6 +342,18 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
> };
> };
>
> + firmware {
> + scm {
> + compatible = "qcom,scm-sc7180", "qcom,scm";
> + };
> + };
> +
> + memory@80000000 {
> + device_type = "memory";
> + /* We expect the bootloader to fill in the size */
> + reg = <0 0x80000000 0 0>;
> + };
> +
> cpu0_opp_table: opp-table-cpu0 {
> compatible = "operating-points-v2";
> opp-shared;
> @@ -538,20 +494,69 @@ cpu6_opp16: opp-2553600000 {
> };
> };
>
> - memory@80000000 {
> - device_type = "memory";
> - /* We expect the bootloader to fill in the size */
> - reg = <0 0x80000000 0 0>;
> - };
> -
> pmu {
> compatible = "arm,armv8-pmuv3";
> interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
> };
>
> - firmware {
> - scm {
> - compatible = "qcom,scm-sc7180", "qcom,scm";
> + psci {
> + compatible = "arm,psci-1.0";
> + method = "smc";
> + };
> +
> + reserved_memory: reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + hyp_mem: memory@80000000 {
> + reg = <0x0 0x80000000 0x0 0x600000>;
> + no-map;
> + };
> +
> + xbl_mem: memory@80600000 {
> + reg = <0x0 0x80600000 0x0 0x200000>;
> + no-map;
> + };
> +
> + aop_mem: memory@80800000 {
> + reg = <0x0 0x80800000 0x0 0x20000>;
> + no-map;
> + };
> +
> + aop_cmd_db_mem: memory@80820000 {
> + reg = <0x0 0x80820000 0x0 0x20000>;
> + compatible = "qcom,cmd-db";
> + no-map;
> + };
> +
> + sec_apps_mem: memory@808ff000 {
> + reg = <0x0 0x808ff000 0x0 0x1000>;
> + no-map;
> + };
> +
> + smem_mem: memory@80900000 {
> + reg = <0x0 0x80900000 0x0 0x200000>;
> + no-map;
> + };
> +
> + tz_mem: memory@80b00000 {
> + reg = <0x0 0x80b00000 0x0 0x3900000>;
> + no-map;
> + };
> +
> + ipa_fw_mem: memory@8b700000 {
> + reg = <0 0x8b700000 0 0x10000>;
> + no-map;
> + };
> +
> + rmtfs_mem: memory@94600000 {
> + compatible = "qcom,rmtfs-mem";
> + reg = <0x0 0x94600000 0x0 0x200000>;
> + no-map;
> +
> + qcom,client-id = <1>;
> + qcom,vmid = <15>;
> };
> };
>
> @@ -640,11 +645,6 @@ ipa_smp2p_in: ipa-modem-to-ap {
> };
> };
>
> - psci {
> - compatible = "arm,psci-1.0";
> - method = "smc";
> - };
> -
> soc: soc@0 {
> #address-cells = <2>;
> #size-cells = <2>;
On 12 December 2022 13:02:27 GMT+03:00, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote:
>Order top-level nodes like memory, reserved-memory, opp-table-cpu
>alphabetically for easier code maintenance. No functional change (same
>dtx_diff).
>
>Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@linaro.org>
>
>---
>
>Changes since v1:
>1. New patch
>---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 144 +++++++++++++--------------
> 1 file changed, 72 insertions(+), 72 deletions(-)
>
>diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>index ea886cf08b4d..6d3e86ce2936 100644
>--- a/arch/arm64/boot/dts/qcom/sc7180.dtsi
>+++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi
>@@ -27,8 +27,6 @@ / {
> #address-cells = <2>;
> #size-cells = <2>;
>
>- chosen { };
>-
> aliases {
> mmc1 = &sdhc_1;
> mmc2 = &sdhc_2;
>@@ -54,6 +52,8 @@ aliases {
> spi11 = &spi11;
> };
>
>+ chosen { };
>+
> clocks {
> xo_board: xo-board {
> compatible = "fixed-clock";
>@@ -68,62 +68,6 @@ sleep_clk: sleep-clk {
> };
> };
>
>- reserved_memory: reserved-memory {
>- #address-cells = <2>;
>- #size-cells = <2>;
>- ranges;
>-
>- hyp_mem: memory@80000000 {
>- reg = <0x0 0x80000000 0x0 0x600000>;
>- no-map;
>- };
>-
>- xbl_mem: memory@80600000 {
>- reg = <0x0 0x80600000 0x0 0x200000>;
>- no-map;
>- };
>-
>- aop_mem: memory@80800000 {
>- reg = <0x0 0x80800000 0x0 0x20000>;
>- no-map;
>- };
>-
>- aop_cmd_db_mem: memory@80820000 {
>- reg = <0x0 0x80820000 0x0 0x20000>;
>- compatible = "qcom,cmd-db";
>- no-map;
>- };
>-
>- sec_apps_mem: memory@808ff000 {
>- reg = <0x0 0x808ff000 0x0 0x1000>;
>- no-map;
>- };
>-
>- smem_mem: memory@80900000 {
>- reg = <0x0 0x80900000 0x0 0x200000>;
>- no-map;
>- };
>-
>- tz_mem: memory@80b00000 {
>- reg = <0x0 0x80b00000 0x0 0x3900000>;
>- no-map;
>- };
>-
>- ipa_fw_mem: memory@8b700000 {
>- reg = <0 0x8b700000 0 0x10000>;
>- no-map;
>- };
>-
>- rmtfs_mem: memory@94600000 {
>- compatible = "qcom,rmtfs-mem";
>- reg = <0x0 0x94600000 0x0 0x200000>;
>- no-map;
>-
>- qcom,client-id = <1>;
>- qcom,vmid = <15>;
>- };
>- };
>-
> cpus {
> #address-cells = <2>;
> #size-cells = <0>;
>@@ -398,6 +342,18 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
> };
> };
>
>+ firmware {
>+ scm {
>+ compatible = "qcom,scm-sc7180", "qcom,scm";
>+ };
>+ };
>+
>+ memory@80000000 {
>+ device_type = "memory";
>+ /* We expect the bootloader to fill in the size */
>+ reg = <0 0x80000000 0 0>;
>+ };
>+
> cpu0_opp_table: opp-table-cpu0 {
> compatible = "operating-points-v2";
> opp-shared;
>@@ -538,20 +494,69 @@ cpu6_opp16: opp-2553600000 {
> };
> };
>
>- memory@80000000 {
>- device_type = "memory";
>- /* We expect the bootloader to fill in the size */
>- reg = <0 0x80000000 0 0>;
>- };
>-
> pmu {
> compatible = "arm,armv8-pmuv3";
> interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
> };
>
>- firmware {
>- scm {
>- compatible = "qcom,scm-sc7180", "qcom,scm";
>+ psci {
>+ compatible = "arm,psci-1.0";
>+ method = "smc";
>+ };
>+
>+ reserved_memory: reserved-memory {
>+ #address-cells = <2>;
>+ #size-cells = <2>;
>+ ranges;
>+
>+ hyp_mem: memory@80000000 {
>+ reg = <0x0 0x80000000 0x0 0x600000>;
>+ no-map;
>+ };
>+
>+ xbl_mem: memory@80600000 {
>+ reg = <0x0 0x80600000 0x0 0x200000>;
>+ no-map;
>+ };
>+
>+ aop_mem: memory@80800000 {
>+ reg = <0x0 0x80800000 0x0 0x20000>;
>+ no-map;
>+ };
>+
>+ aop_cmd_db_mem: memory@80820000 {
>+ reg = <0x0 0x80820000 0x0 0x20000>;
>+ compatible = "qcom,cmd-db";
>+ no-map;
>+ };
>+
>+ sec_apps_mem: memory@808ff000 {
>+ reg = <0x0 0x808ff000 0x0 0x1000>;
>+ no-map;
>+ };
>+
>+ smem_mem: memory@80900000 {
>+ reg = <0x0 0x80900000 0x0 0x200000>;
>+ no-map;
>+ };
>+
>+ tz_mem: memory@80b00000 {
>+ reg = <0x0 0x80b00000 0x0 0x3900000>;
>+ no-map;
>+ };
>+
>+ ipa_fw_mem: memory@8b700000 {
>+ reg = <0 0x8b700000 0 0x10000>;
>+ no-map;
>+ };
>+
>+ rmtfs_mem: memory@94600000 {
>+ compatible = "qcom,rmtfs-mem";
>+ reg = <0x0 0x94600000 0x0 0x200000>;
>+ no-map;
>+
>+ qcom,client-id = <1>;
>+ qcom,vmid = <15>;
> };
> };
>
>@@ -640,11 +645,6 @@ ipa_smp2p_in: ipa-modem-to-ap {
> };
> };
>
>- psci {
>- compatible = "arm,psci-1.0";
>- method = "smc";
>- };
>-
> soc: soc@0 {
> #address-cells = <2>;
> #size-cells = <2>;
On Mon, 12 Dec 2022 11:02:27 +0100, Krzysztof Kozlowski wrote:
> Order top-level nodes like memory, reserved-memory, opp-table-cpu
> alphabetically for easier code maintenance. No functional change (same
> dtx_diff).
>
>
Applied, thanks!
[1/6] arm64: dts: qcom: sc7180: order top-level nodes alphabetically
commit: 41d31fa487fe684ef130d002956b7915584cbabb
[2/6] arm64: dts: qcom: sdm845: order top-level nodes alphabetically
commit: 3bd21131d884b58c0c14926a710241c521352346
[3/6] arm64: dts: qcom: sc7180: move QUP and QSPI opp tables out of SoC node
(no commit info)
[4/6] arm64: dts: qcom: sdm845: move DSI/QUP/QSPI opp tables out of SoC node
(no commit info)
[5/6] arm64: dts: qcom: sdm845: move sound node out of soc
(no commit info)
[6/6] arm64: dts: qcom: sm8250: move sound and codec nodes out of soc
(no commit info)
Best regards,
@@ -27,8 +27,6 @@ / {
#address-cells = <2>;
#size-cells = <2>;
- chosen { };
-
aliases {
mmc1 = &sdhc_1;
mmc2 = &sdhc_2;
@@ -54,6 +52,8 @@ aliases {
spi11 = &spi11;
};
+ chosen { };
+
clocks {
xo_board: xo-board {
compatible = "fixed-clock";
@@ -68,62 +68,6 @@ sleep_clk: sleep-clk {
};
};
- reserved_memory: reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
- hyp_mem: memory@80000000 {
- reg = <0x0 0x80000000 0x0 0x600000>;
- no-map;
- };
-
- xbl_mem: memory@80600000 {
- reg = <0x0 0x80600000 0x0 0x200000>;
- no-map;
- };
-
- aop_mem: memory@80800000 {
- reg = <0x0 0x80800000 0x0 0x20000>;
- no-map;
- };
-
- aop_cmd_db_mem: memory@80820000 {
- reg = <0x0 0x80820000 0x0 0x20000>;
- compatible = "qcom,cmd-db";
- no-map;
- };
-
- sec_apps_mem: memory@808ff000 {
- reg = <0x0 0x808ff000 0x0 0x1000>;
- no-map;
- };
-
- smem_mem: memory@80900000 {
- reg = <0x0 0x80900000 0x0 0x200000>;
- no-map;
- };
-
- tz_mem: memory@80b00000 {
- reg = <0x0 0x80b00000 0x0 0x3900000>;
- no-map;
- };
-
- ipa_fw_mem: memory@8b700000 {
- reg = <0 0x8b700000 0 0x10000>;
- no-map;
- };
-
- rmtfs_mem: memory@94600000 {
- compatible = "qcom,rmtfs-mem";
- reg = <0x0 0x94600000 0x0 0x200000>;
- no-map;
-
- qcom,client-id = <1>;
- qcom,vmid = <15>;
- };
- };
-
cpus {
#address-cells = <2>;
#size-cells = <0>;
@@ -398,6 +342,18 @@ CLUSTER_SLEEP_0: cluster-sleep-0 {
};
};
+ firmware {
+ scm {
+ compatible = "qcom,scm-sc7180", "qcom,scm";
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ /* We expect the bootloader to fill in the size */
+ reg = <0 0x80000000 0 0>;
+ };
+
cpu0_opp_table: opp-table-cpu0 {
compatible = "operating-points-v2";
opp-shared;
@@ -538,20 +494,69 @@ cpu6_opp16: opp-2553600000 {
};
};
- memory@80000000 {
- device_type = "memory";
- /* We expect the bootloader to fill in the size */
- reg = <0 0x80000000 0 0>;
- };
-
pmu {
compatible = "arm,armv8-pmuv3";
interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
};
- firmware {
- scm {
- compatible = "qcom,scm-sc7180", "qcom,scm";
+ psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+
+ reserved_memory: reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ hyp_mem: memory@80000000 {
+ reg = <0x0 0x80000000 0x0 0x600000>;
+ no-map;
+ };
+
+ xbl_mem: memory@80600000 {
+ reg = <0x0 0x80600000 0x0 0x200000>;
+ no-map;
+ };
+
+ aop_mem: memory@80800000 {
+ reg = <0x0 0x80800000 0x0 0x20000>;
+ no-map;
+ };
+
+ aop_cmd_db_mem: memory@80820000 {
+ reg = <0x0 0x80820000 0x0 0x20000>;
+ compatible = "qcom,cmd-db";
+ no-map;
+ };
+
+ sec_apps_mem: memory@808ff000 {
+ reg = <0x0 0x808ff000 0x0 0x1000>;
+ no-map;
+ };
+
+ smem_mem: memory@80900000 {
+ reg = <0x0 0x80900000 0x0 0x200000>;
+ no-map;
+ };
+
+ tz_mem: memory@80b00000 {
+ reg = <0x0 0x80b00000 0x0 0x3900000>;
+ no-map;
+ };
+
+ ipa_fw_mem: memory@8b700000 {
+ reg = <0 0x8b700000 0 0x10000>;
+ no-map;
+ };
+
+ rmtfs_mem: memory@94600000 {
+ compatible = "qcom,rmtfs-mem";
+ reg = <0x0 0x94600000 0x0 0x200000>;
+ no-map;
+
+ qcom,client-id = <1>;
+ qcom,vmid = <15>;
};
};
@@ -640,11 +645,6 @@ ipa_smp2p_in: ipa-modem-to-ap {
};
};
- psci {
- compatible = "arm,psci-1.0";
- method = "smc";
- };
-
soc: soc@0 {
#address-cells = <2>;
#size-cells = <2>;