Message ID | 20221209123910.178609-1-konrad.dybcio@linaro.org |
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State | New |
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[83.9.1.44]) by smtp.gmail.com with ESMTPSA id t8-20020a05651c204800b0027710117ebdsm205321ljo.121.2022.12.09.04.39.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Dec 2022 04:39:13 -0800 (PST) From: Konrad Dybcio <konrad.dybcio@linaro.org> To: linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: patches@linaro.org, Konrad Dybcio <konrad.dybcio@linaro.org>, Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Iskren Chernev <me@iskren.info>, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] clk: qcom: gcc-sm6115: Use floor_ops for SDCC1/2 core clk Date: Fri, 9 Dec 2022 13:39:09 +0100 Message-Id: <20221209123910.178609-1-konrad.dybcio@linaro.org> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751741064654064568?= X-GMAIL-MSGID: =?utf-8?q?1751741064654064568?= |
Series |
clk: qcom: gcc-sm6115: Use floor_ops for SDCC1/2 core clk
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Commit Message
Konrad Dybcio
Dec. 9, 2022, 12:39 p.m. UTC
Just like in case of other SoCs change SDCC1/SDCC2 ops
to floor to avoid overclocking the controller.
Fixes: cbe63bfdc54f ("clk: qcom: Add Global Clock controller (GCC) driver for SM6115")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
drivers/clk/qcom/gcc-sm6115.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Comments
On Fri, 9 Dec 2022 13:39:09 +0100, Konrad Dybcio wrote: > Just like in case of other SoCs change SDCC1/SDCC2 ops > to floor to avoid overclocking the controller. > > Applied, thanks! [1/1] clk: qcom: gcc-sm6115: Use floor_ops for SDCC1/2 core clk commit: 85d4e6ea082d3905f3ede470ac337fddc2d47650 Best regards,
diff --git a/drivers/clk/qcom/gcc-sm6115.c b/drivers/clk/qcom/gcc-sm6115.c index 565f9912039f..5b8222fea2f7 100644 --- a/drivers/clk/qcom/gcc-sm6115.c +++ b/drivers/clk/qcom/gcc-sm6115.c @@ -1258,7 +1258,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = { .name = "gcc_sdcc1_apps_clk_src", .parent_data = gcc_parents_1, .num_parents = ARRAY_SIZE(gcc_parents_1), - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, }, }; @@ -1305,7 +1305,7 @@ static struct clk_rcg2 gcc_sdcc2_apps_clk_src = { .name = "gcc_sdcc2_apps_clk_src", .parent_data = gcc_parents_11, .num_parents = ARRAY_SIZE(gcc_parents_11), - .ops = &clk_rcg2_ops, + .ops = &clk_rcg2_floor_ops, .flags = CLK_OPS_PARENT_ENABLE, }, };