From patchwork Thu Dec 8 05:21:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Weiny X-Patchwork-Id: 31163 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp11581wrr; Wed, 7 Dec 2022 21:26:28 -0800 (PST) X-Google-Smtp-Source: AA0mqf7+r+O3XR7MQmex5EB5Oamx+qGWM61aBXMSy80GjIlNrX3SsyOvqDPRAWyf1/c065ROkK+I X-Received: by 2002:aa7:dbc3:0:b0:461:6b61:81ae with SMTP id v3-20020aa7dbc3000000b004616b6181aemr82591590edt.62.1670477188229; Wed, 07 Dec 2022 21:26:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670477188; cv=none; d=google.com; s=arc-20160816; b=ax3SjILSiXmtFpfmxaM62/8sSTMx/3B1r4i7/rQ/0LddNjvycHWlAJaAEMWSDJk0WD dhihhvRyN19KqpMxlxp+PnG+beG/77kgNpd8XxHhxk1KEF+anlGcyp4ZyID0JnOXvslo aEbYHbQQ5ruT0WtlwF35usWNgQbadWOal+MqvmMAEt6O7j0aim5QMJ/CySekt8HMWabM owhuVTjzfRRPBiWfhkt/VrIqpN/RQuo8WsHgddGFsNTvqdkWSJnGriJ/os76Fxd5RG77 LfsJfazLeJ869jbb8pg6VJo+AMisejlPPOYnrGFTKaMXECo3usVI2mqDyFsSEVB/X7SK r/eg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=z81m3N3oz3Eucw/eU//q/rA/774YxDY7IS8apkUG+dM=; b=TrUyVb9pobhj/l0pdJCvxisnEfrsw+eWri84deEYh3HBfX42HPg0AyplfL7STc/Ca5 qHHAZP8X1ILe6Q2C6eid5fhMo1cAMvudsteayj+BZvJSQ8GSuDSanl6jM7JMaAC7Ybly LcCF5lxnUAEK1gEpNSArkbVWYiAqxMaa+eOww+XuIu4MFLeHF+JcStTXusmhnd8ry4nK ZYE0w1tn5FXFokajP6af6H/6nfU2eMHo09BIKgSGZTJ4tZ9CKZzGfImj8Tc/Q+mDG3Cr CVCwOjqwtnAJzfm8+d1diXZZJ8ewf3TdZgL8lJwq2hRVTPSUB9QucbIWNrN8Dt8T1+ra yxOg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=QnK2y0Mo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hq10-20020a1709073f0a00b007c1070653adsi6365168ejc.809.2022.12.07.21.26.04; Wed, 07 Dec 2022 21:26:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=QnK2y0Mo; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229781AbiLHFWL (ORCPT + 99 others); Thu, 8 Dec 2022 00:22:11 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229796AbiLHFVy (ORCPT ); Thu, 8 Dec 2022 00:21:54 -0500 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B79DA9AE31; Wed, 7 Dec 2022 21:21:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670476892; x=1702012892; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WScvzpk6t8UtarWTLv+d8vPwWtgaiVrryZDE+wX+/e4=; b=QnK2y0MoCguAIfXvfLPcRCd+UKXjNzeMfqXlGSKvhbJ5ThcA1NCpUN4I ABdcNAaHgSNkgT5VaxPayt5HZqkH6SxgwER4lJZZ+m9jyGy4V4U76wukZ rznbsxhGrM+CYCLwkEI7Z8Dn22MoNo4FTACQ8Zv8ToBum0lb5ebY0Gbm8 iMn3mlks1fP0SKT3HZKLIRD9SdxsmvsIZ4eCxNotOAGts4GEd4cduEVOQ +f+leUaJb8wRCEClXgxwHlB1hMwzp5tJ7h+XgV/9oxJMZXTvWkk1H33cd pn08FOVSIJt1htGRZYTl4tJqfBSXVTSK0kgkAh1sjopR/ZDRLEaYS24RC A==; X-IronPort-AV: E=McAfee;i="6500,9779,10554"; a="381367276" X-IronPort-AV: E=Sophos;i="5.96,226,1665471600"; d="scan'208";a="381367276" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2022 21:21:32 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10554"; a="710324493" X-IronPort-AV: E=Sophos;i="5.96,226,1665471600"; d="scan'208";a="710324493" Received: from iweiny-mobl.amr.corp.intel.com (HELO localhost) ([10.209.25.22]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Dec 2022 21:21:29 -0800 From: ira.weiny@intel.com To: Dan Williams Cc: Ira Weiny , Jonathan Cameron , Bjorn Helgaas , Alison Schofield , Vishal Verma , Davidlohr Bueso , Dave Jiang , linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org, linux-cxl@vger.kernel.org Subject: [PATCH V3 7/8] cxl/test: Add specific events Date: Wed, 7 Dec 2022 21:21:13 -0800 Message-Id: <20221208052115.800170-8-ira.weiny@intel.com> X-Mailer: git-send-email 2.37.2 In-Reply-To: <20221208052115.800170-1-ira.weiny@intel.com> References: <20221208052115.800170-1-ira.weiny@intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751622288407252120?= X-GMAIL-MSGID: =?utf-8?q?1751622288407252120?= From: Ira Weiny Each type of event has different trace point outputs. Add mock General Media Event, DRAM event, and Memory Module Event records to the mock list of events returned. Reviewed-by: Jonathan Cameron Signed-off-by: Ira Weiny --- Changes from V2: Rebased on pending cxl-security branch Changes from V1: Jonathan use put_unaligned_le16() fix spacing Changes from RFC: Adjust for struct changes adjust for unaligned fields --- tools/testing/cxl/test/events.c | 73 +++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) diff --git a/tools/testing/cxl/test/events.c b/tools/testing/cxl/test/events.c index 1346c38dce1d..5214826d264f 100644 --- a/tools/testing/cxl/test/events.c +++ b/tools/testing/cxl/test/events.c @@ -184,12 +184,85 @@ struct cxl_event_record_raw hardware_replace = { .data = { 0xDE, 0xAD, 0xBE, 0xEF }, }; +struct cxl_event_gen_media gen_media = { + .hdr = { + .id = UUID_INIT(0xfbcd0a77, 0xc260, 0x417f, + 0x85, 0xa9, 0x08, 0x8b, 0x16, 0x21, 0xeb, 0xa6), + .length = sizeof(struct cxl_event_gen_media), + .flags[0] = CXL_EVENT_RECORD_FLAG_PERMANENT, + /* .handle = Set dynamically */ + .related_handle = cpu_to_le16(0), + }, + .phys_addr = cpu_to_le64(0x2000), + .descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT, + .type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR, + .transaction_type = CXL_GMER_TRANS_HOST_WRITE, + /* .validity_flags = */ + .channel = 1, + .rank = 30 +}; + +struct cxl_event_dram dram = { + .hdr = { + .id = UUID_INIT(0x601dcbb3, 0x9c06, 0x4eab, + 0xb8, 0xaf, 0x4e, 0x9b, 0xfb, 0x5c, 0x96, 0x24), + .length = sizeof(struct cxl_event_dram), + .flags[0] = CXL_EVENT_RECORD_FLAG_PERF_DEGRADED, + /* .handle = Set dynamically */ + .related_handle = cpu_to_le16(0), + }, + .phys_addr = cpu_to_le64(0x8000), + .descriptor = CXL_GMER_EVT_DESC_THRESHOLD_EVENT, + .type = CXL_GMER_MEM_EVT_TYPE_INV_ADDR, + .transaction_type = CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB, + /* .validity_flags = */ + .channel = 1, + .bank_group = 5, + .bank = 2, + .column = {0xDE, 0xAD}, +}; + +struct cxl_event_mem_module mem_module = { + .hdr = { + .id = UUID_INIT(0xfe927475, 0xdd59, 0x4339, + 0xa5, 0x86, 0x79, 0xba, 0xb1, 0x13, 0xb7, 0x74), + .length = sizeof(struct cxl_event_mem_module), + /* .handle = Set dynamically */ + .related_handle = cpu_to_le16(0), + }, + .event_type = CXL_MMER_TEMP_CHANGE, + .info = { + .health_status = CXL_DHI_HS_PERFORMANCE_DEGRADED, + .media_status = CXL_DHI_MS_ALL_DATA_LOST, + .add_status = (CXL_DHI_AS_CRITICAL << 2) | + (CXL_DHI_AS_WARNING << 4) | + (CXL_DHI_AS_WARNING << 5), + .device_temp = { 0xDE, 0xAD}, + .dirty_shutdown_cnt = { 0xde, 0xad, 0xbe, 0xef }, + .cor_vol_err_cnt = { 0xde, 0xad, 0xbe, 0xef }, + .cor_per_err_cnt = { 0xde, 0xad, 0xbe, 0xef }, + } +}; + void cxl_mock_add_event_logs(struct mock_event_store *mes) { + put_unaligned_le16(CXL_GMER_VALID_CHANNEL | CXL_GMER_VALID_RANK, + &gen_media.validity_flags); + + put_unaligned_le16(CXL_DER_VALID_CHANNEL | CXL_DER_VALID_BANK_GROUP | + CXL_DER_VALID_BANK | CXL_DER_VALID_COLUMN, + &dram.validity_flags); + event_store_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed); + event_store_add_event(mes, CXL_EVENT_TYPE_INFO, + (struct cxl_event_record_raw *)&gen_media); + event_store_add_event(mes, CXL_EVENT_TYPE_INFO, + (struct cxl_event_record_raw *)&mem_module); mes->ev_status |= CXLDEV_EVENT_STATUS_INFO; event_store_add_event(mes, CXL_EVENT_TYPE_FATAL, &hardware_replace); + event_store_add_event(mes, CXL_EVENT_TYPE_FATAL, + (struct cxl_event_record_raw *)&dram); mes->ev_status |= CXLDEV_EVENT_STATUS_FATAL; } EXPORT_SYMBOL_GPL(cxl_mock_add_event_logs);