diff mbox series

[v5,3/7] x86/cpu: Make X86_FEATURE_LFENCE_RDTSC a scattered feature bit

Message ID 20221205233235.622491-4-kim.phillips@amd.com
State New
Headers
Series x86/cpu, kvm: Support AMD Automatic IBRS |

Commit Message

Kim Phillips Dec. 5, 2022, 11:32 p.m. UTC 
  It's a part of the CPUID 0x80000021 leaf, and will be grouped
with other feature bits to being propagated via kvm_set_cpu_caps()
instead of open-coding them in __do_cpuid_func().

Unlike the other CPUID 0x80000021 EAX feature bits,
X86_FEATURE_LFENCE_RDTSC already had an entry in cpufeatures.h.

Signed-off-by: Kim Phillips <kim.phillips@amd.com>
---
 arch/x86/kernel/cpu/scattered.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Borislav Petkov Dec. 27, 2022, 10:51 a.m. UTC | #1 
On Mon, Dec 05, 2022 at 05:32:31PM -0600, Kim Phillips wrote:
> It's a part of the CPUID 0x80000021 leaf, and will be grouped
> with other feature bits to being propagated via kvm_set_cpu_caps()
> instead of open-coding them in __do_cpuid_func().
> 
> Unlike the other CPUID 0x80000021 EAX feature bits,
> X86_FEATURE_LFENCE_RDTSC already had an entry in cpufeatures.h.
> 
> Signed-off-by: Kim Phillips <kim.phillips@amd.com>
> ---
>  arch/x86/kernel/cpu/scattered.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
> index d0734cc19d37..caa03466cd9e 100644
> --- a/arch/x86/kernel/cpu/scattered.c
> +++ b/arch/x86/kernel/cpu/scattered.c
> @@ -46,6 +46,7 @@ static const struct cpuid_bit cpuid_bits[] = {
>  	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
>  	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
>  	{ X86_FEATURE_NO_NESTED_DATA_BP,CPUID_EAX,  0, 0x80000021, 0 },
> +	{ X86_FEATURE_LFENCE_RDTSC,	CPUID_EAX,  2, 0x80000021, 0 },

Hmm, so this patchset keeps growing and growing with new bits.

Perhaps my initial suggestion to make it a scattered one doesn't make
a whole lot of sense anymore.

/me goes and looks at CPUID_Fn80000021_EAX [Extended Feature 2 EAX] (Core::X86::Cpuid::FeatureExt2Eax)

Yah, judging by what's there in that leaf, we are likely to use a lot
more bits in the future I think you should go back to

https://lore.kernel.org/lkml/20221104213651.141057-2-kim.phillips@amd.com/

But please state in that commit message that the majority of the feature
bits in CPUID_Fn80000021_EAX will be used in the kernel and thus a
separate leaf makes sense.

Thx.
diff mbox series

Patch

diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index d0734cc19d37..caa03466cd9e 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -46,6 +46,7 @@  static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_PROC_FEEDBACK,    CPUID_EDX, 11, 0x80000007, 0 },
 	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
 	{ X86_FEATURE_NO_NESTED_DATA_BP,CPUID_EAX,  0, 0x80000021, 0 },
+	{ X86_FEATURE_LFENCE_RDTSC,	CPUID_EAX,  2, 0x80000021, 0 },
 	{ X86_FEATURE_NULL_SEL_CLR_BASE,CPUID_EAX,  6, 0x80000021, 0 },
 	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },