From patchwork Sun Dec 4 04:35:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiucheng Xu X-Patchwork-Id: 29368 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1644031wrr; Sat, 3 Dec 2022 20:45:01 -0800 (PST) X-Google-Smtp-Source: AA0mqf77j+2+tkJJn+FaXl9V7qigkXTz6tJLTuITCriqJzxaHxfG8wlRzONsvccNWZCu6G/4XqUm X-Received: by 2002:a63:525e:0:b0:477:bca8:1cd9 with SMTP id s30-20020a63525e000000b00477bca81cd9mr44513201pgl.581.1670129101424; Sat, 03 Dec 2022 20:45:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670129101; cv=none; d=google.com; s=arc-20160816; b=Es62TWnjzvZN6k7kCcAlq1GOd9qxtOb+Zo0jpG4Rw/MzOm9hzHW4Wa/C4sYPI+RpBy piFG+knFMrZgU8wB8wCpSNrEn/uAUXcF3HLrwdvv8w7dL8Gt1wlurpj2BY/ixmQjbkmE sfmvQQxau14b+v9tAVvVDZw6lEWPn1KUXUK2CEkrdhYHA4WtgmGo9dNQBMh5ybfYVQLs hp21XByBDHZy3n0PifE9TINYYeYbuUxHgU+PE4EZ77VMMMWTIH4ML5SrBqKKN6oc7dny bG2Kja4769PDc3Gz2wXZ/18yMwOENVdr8eqld742lU8DxP8jdx2EmsfYFbVn2cq6Pqj1 npIw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=j9RFEAB65Hh16CcHs/QoXaDPPLAETNVYANHUU5sGo0I=; b=gS2Ijzkk7YepxgKrCpg/Lwnek2j6bTzZzcwecvMCHX6Jn4G3j0iip0uA15B0ktm2xs 5is7VyuLFYo9KZTTXWd8SXlnblbtXHiWhjy5cA6o3Hl3nIjStYih1+dAj2Svej1O63o5 95GGbr6L19wbaTxDh5oflogl7DaAII8FImJxhR9GMLpvb7RAJ3HQeoR+M5s82Pp2wzMZ N8KkMUBpvf6fdm74+as/oRGEnYjqkakMO+tyYKhXfLjkfPCq49zO/Twm6QlHgzGAH+Nr vnSm1kMIdndoh98RFfVSNmYL18amun2muaD2asoAZeR0xiXBH9ZtQAAQhCStqx7GwCoZ btyg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id il14-20020a17090b164e00b002130aae4825si15579934pjb.9.2022.12.03.20.44.48; Sat, 03 Dec 2022 20:45:01 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229922AbiLDEhE (ORCPT + 99 others); Sat, 3 Dec 2022 23:37:04 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59584 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229579AbiLDEhC (ORCPT ); Sat, 3 Dec 2022 23:37:02 -0500 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E7BED19008 for ; Sat, 3 Dec 2022 20:36:03 -0800 (PST) Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Sun, 4 Dec 2022 12:36:01 +0800 From: Jiucheng Xu To: Catalin Marinas , Will Deacon CC: Jianxin Pan , Kelvin Zhang , Chris Healy , Chris Healy , Neil Armstrong , Jiucheng Xu , , Subject: [PATCH] arm64: defconfig: Add Meson DDR PMU as module Date: Sun, 4 Dec 2022 12:35:30 +0800 Message-ID: <20221204043530.1673752-1-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.88.11.200] X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751257293022798796?= X-GMAIL-MSGID: =?utf-8?q?1751257293022798796?= Add Meson DDR PMU to defconfig so that build errors are caught. Signed-off-by: Jiucheng Xu --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 0b6af3348e79..f2324b54a6ba 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1265,6 +1265,7 @@ CONFIG_ARM_DMC620_PMU=m CONFIG_QCOM_L2_PMU=y CONFIG_QCOM_L3_PMU=y CONFIG_HISI_PMU=y +CONFIG_MESON_DDR_PMU=m CONFIG_NVMEM_IMX_OCOTP=y CONFIG_NVMEM_IMX_OCOTP_SCU=y CONFIG_NVMEM_MTK_EFUSE=y