From patchwork Sat Dec 3 00:36:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Edgecombe, Rick P" X-Patchwork-Id: 29197 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp1143550wrr; Fri, 2 Dec 2022 16:44:48 -0800 (PST) X-Google-Smtp-Source: AA0mqf59Acwhyq101bCxdprEs1HKLSpxuf5f4ptGzApxSpbAneUvDWCOS2L0PFiiuanD682zJwo8 X-Received: by 2002:aa7:9a4e:0:b0:563:b1bc:7f98 with SMTP id x14-20020aa79a4e000000b00563b1bc7f98mr54243712pfj.29.1670028288311; Fri, 02 Dec 2022 16:44:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1670028288; cv=none; d=google.com; s=arc-20160816; b=eiNbZXiuFzDxqJjmdJKiDpLqfeR4somgDgOcALuDuOGIbiGfFYaxli2jVMf0B+6+RU A6dHhjGhXS/ERcwBAuZR2B6s5I+WhzCBP758CTmZunG7mnbiV7BEOJORrIhK4sjzjI9d Gq3glwZh5OmZ+ZiKt5IS3ZXm+TgvelzOq9uciRFg3dUk0AtmV6JEhxFXcXr0FjwdhPXw jhOfyqjBoJjzo893zrKjuzroTYQ+2IxrChDkVoOc325nrbf3EQfAITER8v+93DCaRM26 B8oybLWlHXI0Uoh+90KWNMQ+ThUpzSE6yETsMhFZ0zQbTZrwf9MJkob7CX7cfbH1ccoB nf1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=PBSOj0CQcG8eJ62zEVn8L7b7RKx/StbKLg+xXU3bKoo=; b=VqcG3OBm5fFdt8SHYH5N6FAA76QvEypnoHFYfFWfJJxiqPEWQ52x8QPVwREYvpHgoK uvC9tsq3GFQ10USWLxzdgOumKqXWAb9W7thEkbNviNd3d+9yDW/aTsfRi73nUn/G54Nm InytLIOJMGD3prmPQYgIFDj/RW3ntqhxAPGmNo2rEVkjeW2clwxivBJUf/LLt38tI61c N6cOLsvEiLCyhPxUfyI+AXX39z/ZzS2SM+/6EtPJMsvBaar972wjrwcQCLDo5QkW6gU+ gvG/RU9GCJpCCnKHKVivl7jYNNss26P/sJoLLj4Jpv97JFDqhMwYfYurKfWaNSFFxk6C bItA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Ldddwqru; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ix4-20020a170902f80400b0018725be1285si7825394plb.558.2022.12.02.16.44.35; Fri, 02 Dec 2022 16:44:48 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Ldddwqru; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235209AbiLCAoA (ORCPT + 99 others); Fri, 2 Dec 2022 19:44:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54272 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235145AbiLCAmI (ORCPT ); Fri, 2 Dec 2022 19:42:08 -0500 Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BB59CFA477; Fri, 2 Dec 2022 16:38:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1670027917; x=1701563917; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=ihrpz4xCBLZQivZyXSYIAMTeYpug2An/yX4B7/nlQAk=; b=Ldddwqru6iEH6rmHwtdhhdyQofSD9ZDYHWreFVP7PySiP6f5P8z1mrzZ 6MWo4aS+KFLOVCONv5lQbMiETlTxa0MQf7288+6gWFkT3TvTHcA1VxoGP j4Cx+qcn3EU/2973Su44pVd3KT5moTTEnD8XEUD5IuwHyE6L14sWgXnnj hT4KOn3sriQy8gS9UoiY2CQ9kjdIVDtJRl1zcfK9xQOhjjACZ2y6B+091 iS0TRzrs1vLwdGr4F/myFUhLlSYTuJA9n5czDA/vebfKReq7cX6X4N/sH g/wnY1C9aYM8YWBUg1a0OnvZBFX2K+WupYiEfP0ctwSugPj7qUBAddQjx A==; X-IronPort-AV: E=McAfee;i="6500,9779,10549"; a="313711666" X-IronPort-AV: E=Sophos;i="5.96,213,1665471600"; d="scan'208";a="313711666" Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Dec 2022 16:37:55 -0800 X-IronPort-AV: E=McAfee;i="6500,9779,10549"; a="787480067" X-IronPort-AV: E=Sophos;i="5.96,213,1665471600"; d="scan'208";a="787480067" Received: from bgordon1-mobl1.amr.corp.intel.com (HELO rpedgeco-desk.amr.corp.intel.com) ([10.212.211.211]) by fmsmga001-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Dec 2022 16:37:52 -0800 From: Rick Edgecombe To: x86@kernel.org, "H . Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H . J . Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , Weijiang Yang , "Kirill A . Shutemov" , John Allen , kcc@google.com, eranian@google.com, rppt@kernel.org, jamorris@linux.microsoft.com, dethoma@microsoft.com, akpm@linux-foundation.org, Andrew.Cooper3@citrix.com, christina.schimpe@intel.com Cc: rick.p.edgecombe@intel.com, Mike Rapoport Subject: [PATCH v4 38/39] x86/shstk: Add ARCH_SHSTK_UNLOCK Date: Fri, 2 Dec 2022 16:36:05 -0800 Message-Id: <20221203003606.6838-39-rick.p.edgecombe@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221203003606.6838-1-rick.p.edgecombe@intel.com> References: <20221203003606.6838-1-rick.p.edgecombe@intel.com> X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751151582627041631?= X-GMAIL-MSGID: =?utf-8?q?1751151582627041631?= From: Mike Rapoport Userspace loaders may lock features before a CRIU restore operation has the chance to set them to whatever state is required by the process being restored. Allow a way for CRIU to unlock features. Add it as an arch_prctl() like the other shadow stack operations, but restrict it being called by the ptrace arch_pctl() interface. Tested-by: Pengfei Xu Tested-by: John Allen Signed-off-by: Mike Rapoport [Merged into recent API changes, added commit log and docs] Signed-off-by: Rick Edgecombe Reviewed-by: Kees Cook --- v4: - Add to docs that it is ptrace only. - Remove "CET" references v3: - Depend on CONFIG_CHECKPOINT_RESTORE (Kees) Documentation/x86/shstk.rst | 4 ++++ arch/x86/include/uapi/asm/prctl.h | 1 + arch/x86/kernel/process_64.c | 1 + arch/x86/kernel/shstk.c | 9 +++++++-- 4 files changed, 13 insertions(+), 2 deletions(-) diff --git a/Documentation/x86/shstk.rst b/Documentation/x86/shstk.rst index 8e0b2fe83ef8..0d7d1ccfff06 100644 --- a/Documentation/x86/shstk.rst +++ b/Documentation/x86/shstk.rst @@ -73,6 +73,10 @@ arch_prctl(ARCH_SHSTK_LOCK, unsigned long features) are ignored. The mask is ORed with the existing value. So any feature bits set here cannot be enabled or disabled afterwards. +arch_prctl(ARCH_SHSTK_UNLOCK, unsigned long features) + Unlock features. 'features' is a mask of all features to unlock. All + bits set are processed, unset bits are ignored. Only works via ptrace. + The return values are as following: On success, return 0. On error, errno can be:: diff --git a/arch/x86/include/uapi/asm/prctl.h b/arch/x86/include/uapi/asm/prctl.h index f13751c6bae4..0c95688cf58e 100644 --- a/arch/x86/include/uapi/asm/prctl.h +++ b/arch/x86/include/uapi/asm/prctl.h @@ -30,6 +30,7 @@ #define ARCH_SHSTK_ENABLE 0x5001 #define ARCH_SHSTK_DISABLE 0x5002 #define ARCH_SHSTK_LOCK 0x5003 +#define ARCH_SHSTK_UNLOCK 0x5004 /* ARCH_SHSTK_ features bits */ #define ARCH_SHSTK_SHSTK (1ULL << 0) diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 4ddd7d9209e1..2be6e01fb144 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -921,6 +921,7 @@ long do_arch_prctl_64(struct task_struct *task, int option, unsigned long arg2) case ARCH_SHSTK_ENABLE: case ARCH_SHSTK_DISABLE: case ARCH_SHSTK_LOCK: + case ARCH_SHSTK_UNLOCK: return shstk_prctl(task, option, arg2); default: ret = -EINVAL; diff --git a/arch/x86/kernel/shstk.c b/arch/x86/kernel/shstk.c index 5d91e653f77a..95579f7bace3 100644 --- a/arch/x86/kernel/shstk.c +++ b/arch/x86/kernel/shstk.c @@ -455,9 +455,14 @@ long shstk_prctl(struct task_struct *task, int option, unsigned long features) return 0; } - /* Don't allow via ptrace */ - if (task != current) + /* Only allow via ptrace */ + if (task != current) { + if (option == ARCH_SHSTK_UNLOCK && IS_ENABLED(CONFIG_CHECKPOINT_RESTORE)) { + task->thread.features_locked &= ~features; + return 0; + } return -EINVAL; + } /* Do not allow to change locked features */ if (features & task->thread.features_locked)