[v6,8/8] arm64: dts: Fix NPU power domain references in Amlogic G12-based SoCs
Commit Message
The power sequence is different between SoCs in that family, so get the
right bits for each one.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
---
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 --
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++
3 files changed, 8 insertions(+), 2 deletions(-)
Comments
On 02/12/2022 12:52, Tomeu Vizoso wrote:
> The power sequence is different between SoCs in that family, so get the
> right bits for each one.
>
> Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
> ---
> arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 2 --
> arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++++
> arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++
> 3 files changed, 8 insertions(+), 2 deletions(-)
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
I'll probably squash it in patch 4.
thanks,
Neil
@@ -11,7 +11,6 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
#include <dt-bindings/thermal/thermal.h>
-#include <dt-bindings/power/meson-g12a-power.h>
/ {
interrupt-parent = <&gic>;
@@ -2493,6 +2492,5 @@ npu: npu@ff100000 {
<&clkc CLKID_NNA_AXI_CLK>;
clock-names = "core", "bus";
resets = <&reset RESET_NNA>;
- power-domains = <&pwrc PWRC_G12A_NNA_ID>;
};
};
@@ -139,3 +139,7 @@ map1 {
&mali {
dma-coherent;
};
+
+&npu {
+ power-domains = <&pwrc PWRC_G12A_NNA_ID>;
+};
@@ -543,3 +543,7 @@ &vpu {
&usb {
power-domains = <&pwrc PWRC_SM1_USB_ID>;
};
+
+&npu {
+ power-domains = <&pwrc PWRC_SM1_NNA_ID>;
+};