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[75.76.18.234]) by smtp.gmail.com with ESMTPSA id f12-20020ac8464c000000b003a55fe9f352sm2908912qto.64.2022.12.01.10.15.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 01 Dec 2022 10:15:45 -0800 (PST) From: Nathan Barrett-Morrison Cc: nathan.morrison@timesys.com, greg.malysa@timesys.com, Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org (open list:SPI NOR SUBSYSTEM), linux-kernel@vger.kernel.org (open list) Subject: [PATCH 2/3] mtd: spi-nor: Add additional octal-mode flags to be checked during SFDP Date: Thu, 1 Dec 2022 13:15:31 -0500 Message-Id: <20221201181532.255449-3-nathan.morrison@timesys.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20221201181532.255449-1-nathan.morrison@timesys.com> References: <20221201181532.255449-1-nathan.morrison@timesys.com> MIME-Version: 1.0 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751036638929532463?= X-GMAIL-MSGID: =?utf-8?q?1751036638929532463?= This adds some support for searching a chips SFDP table for: read commands: 1S-8S-8S program commands: 1S-1S-8S, 1S-8S-8S Signed-off-by: Nathan Barrett-Morrison --- drivers/mtd/spi-nor/core.c | 21 ++++++++++++++++++++- drivers/mtd/spi-nor/core.h | 9 ++++++--- 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c index bee8fc4c9f07..7475a9a22881 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c @@ -2335,7 +2335,7 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) { struct spi_nor_flash_parameter *params = nor->params; struct spi_nor_erase_map *map = ¶ms->erase_map; - const u8 no_sfdp_flags = nor->info->no_sfdp_flags; + const u16 no_sfdp_flags = nor->info->no_sfdp_flags; u8 i, erase_mask; if (no_sfdp_flags & SPI_NOR_DUAL_READ) { @@ -2359,6 +2359,25 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) SNOR_PROTO_1_1_8); } + if (no_sfdp_flags & SPI_NOR_OCTAL_READ_1_8_8) { + params->hwcaps.mask |= SNOR_HWCAPS_READ_1_8_8; + spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_1_8_8], + 0, 16, SPINOR_OP_READ_1_8_8, + SNOR_PROTO_1_8_8); + } + + if (no_sfdp_flags & SPI_NOR_OCTAL_PP) { + params->hwcaps.mask |= SNOR_HWCAPS_PP_1_1_8; + spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_1_1_8], + SPINOR_OP_PP_1_1_8, SNOR_PROTO_1_1_8); + } + + if (no_sfdp_flags & SPI_NOR_OCTAL_PP_1_8_8) { + params->hwcaps.mask |= SNOR_HWCAPS_PP_1_8_8; + spi_nor_set_pp_settings(¶ms->page_programs[SNOR_CMD_PP_8_8_8], + SPINOR_OP_PP_1_8_8, SNOR_PROTO_1_8_8); + } + if (no_sfdp_flags & SPI_NOR_OCTAL_DTR_READ) { params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR; spi_nor_set_read_settings(¶ms->reads[SNOR_CMD_READ_8_8_8_DTR], diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h index 85b0cf254e97..25a0d4f1850b 100644 --- a/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h @@ -508,14 +508,17 @@ struct flash_info { #define NO_CHIP_ERASE BIT(7) #define SPI_NOR_NO_FR BIT(8) - u8 no_sfdp_flags; + u16 no_sfdp_flags; #define SPI_NOR_SKIP_SFDP BIT(0) #define SECT_4K BIT(1) #define SPI_NOR_DUAL_READ BIT(3) #define SPI_NOR_QUAD_READ BIT(4) #define SPI_NOR_OCTAL_READ BIT(5) -#define SPI_NOR_OCTAL_DTR_READ BIT(6) -#define SPI_NOR_OCTAL_DTR_PP BIT(7) +#define SPI_NOR_OCTAL_READ_1_8_8 BIT(6) +#define SPI_NOR_OCTAL_PP BIT(7) +#define SPI_NOR_OCTAL_PP_1_8_8 BIT(8) +#define SPI_NOR_OCTAL_DTR_READ BIT(9) +#define SPI_NOR_OCTAL_DTR_PP BIT(10) u8 fixup_flags; #define SPI_NOR_4B_OPCODES BIT(0)