From patchwork Thu Dec 1 12:15:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?WXVuZmVpIERvbmcgKOiRo+S6kemjnik=?= X-Patchwork-Id: 28347 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp232492wrr; Thu, 1 Dec 2022 04:30:47 -0800 (PST) X-Google-Smtp-Source: AA0mqf6JpINgsGdMusV2xQvXn7rZA4+xq9weocUZ8oP6pTtfAmvV+zaK9+6dp5xVwvYeMOZMhSYW X-Received: by 2002:a17:903:32cd:b0:178:32b9:6f4f with SMTP id i13-20020a17090332cd00b0017832b96f4fmr47548313plr.94.1669897847439; Thu, 01 Dec 2022 04:30:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669897847; cv=none; d=google.com; s=arc-20160816; b=oQL1BA7X11xfOWO+Q6kX8XEO0K5Q5ZbMPMXDNyOG7Mb+frDZUtbv9FKftUCsOtpOcq +sfw4y2Ahvq5R7MOr2uGS2JNeSgPTi3Nh2/z7175iCLRSWkrneZYCjuUeEZGntrVmcYb HX4ZX72TNCTqzsSzsvgz+4fEcUnUqKJwSPXUHhT4mh4Mt4mtUckFAeS/Ji4fFpYWFu4s Zx7JR5Lko/dqSGIhaCNvjSXzk+mpA1jxmwWHMkc1YuHib6Dmo4Ut9tJasC0UgHLLHWim XYeJYPdsCniZUeHGFKcMCk59C2sfTk6lTC/k8dN+OiJ1y3EJl9bAdRHGIpthhRA/Ucjl 63hg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=v3BHYtdynVQ1ED8tKvYbtEtKnY+thsCLl4FMBWcFSww=; b=U48oCqAlDbNPkehv+d5zp1KGnEdqNM4h0oWWgpQGOqw8FYpwwT3kp9//mcwtELlVRp 0IK+9dPH/vic4UXIsArU4HFOsRzUYwpOgw8jaVgORjGdLoeAkzq00q9EYmnO2t6fEOef N4uGGaoKc0m8RRcAac44GvuAOzXY7loYMBF8rlSPSDKpCqFs+BLCcHdxWLscYmMtDbpz cyRVW/U1GK+lOmO9VhXdbKBsSdq54rXomX31wsklJ6rtUiZwXUhir4DL3tSq4X99Pc9K MNgCXIz19rNdK3eZ/rC2HXhC+mtBbyU2XrPT1OTOqXLo3eManneRlm2tDfFGeeWAWTAs dtWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Bhblt4lU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id u7-20020a170902714700b001732b4e99c4si3980154plm.377.2022.12.01.04.30.32; Thu, 01 Dec 2022 04:30:47 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=Bhblt4lU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231324AbiLAMPm (ORCPT + 99 others); Thu, 1 Dec 2022 07:15:42 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55924 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229627AbiLAMPk (ORCPT ); Thu, 1 Dec 2022 07:15:40 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 171C9A322F; Thu, 1 Dec 2022 04:15:33 -0800 (PST) X-UUID: b246090c86c143c8b81a181d859c7e0a-20221201 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=v3BHYtdynVQ1ED8tKvYbtEtKnY+thsCLl4FMBWcFSww=; b=Bhblt4lUtZ/GoGpoprTe92jGbxMgccx/xyNXIh3bKbjkMaM5HJl5XwacvEZECMwLERXyih02nZbE3ZLuax1yZhBoMsTk1OL2ieSbQIbcWYGyfEtj6+6Grbt/shJ4TUDDkwPk71gMH3zgwa3P1R4g6pc7mM9posGCRvqVe4cOT38=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14,REQID:32458a01-4fd9-4f4f-befb-cbd39c3d8f9a,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:dcaaed0,CLOUDID:cf046430-2938-482e-aafd-98d66723b8a9,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: b246090c86c143c8b81a181d859c7e0a-20221201 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 297904643; Thu, 01 Dec 2022 20:15:28 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 1 Dec 2022 20:15:27 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 1 Dec 2022 20:15:27 +0800 From: Yunfei Dong To: Yunfei Dong , Rob Herring , Chen-Yu Tsai , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin CC: Mauro Carvalho Chehab , Matthias Brugger , Hsin-Yi Wang , Daniel Vetter , Steve Cho , , , , , , Subject: [PATCH v3,2/3] media: dt-bindings: media: mediatek: vcodec: Change the max reg value to 2 Date: Thu, 1 Dec 2022 20:15:23 +0800 Message-ID: <20221201121525.30777-2-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221201121525.30777-1-yunfei.dong@mediatek.com> References: <20221201121525.30777-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, T_SPF_TEMPERROR,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1751014805453176631?= X-GMAIL-MSGID: =?utf-8?q?1751014805453176631?= From: Yunfei Dong Need to add racing control register base in device node for mt8195 support inner racing mode. Changing the max reg value from 1 to 2. Signed-off-by: Yunfei Dong Reviewed-by: AngeloGioacchino Del Regno Acked-by: Rob Herring --- .../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index 09781ef02193..d20ef15147a4 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -61,7 +61,10 @@ properties: - mediatek,mt8195-vcodec-dec reg: - maxItems: 1 + minItems: 1 + items: + - description: VDEC_SYS register space + - description: VDEC_RACING_CTRL register space iommus: minItems: 1 @@ -98,6 +101,7 @@ patternProperties: reg: maxItems: 1 + description: VDEC_MISC register space interrupts: maxItems: 1