[V2,10/11] cxl/test: Add specific events
Commit Message
From: Ira Weiny <ira.weiny@intel.com>
Each type of event has different trace point outputs.
Add mock General Media Event, DRAM event, and Memory Module Event
records to the mock list of events returned.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
Changes from V1:
Jonathan
use put_unaligned_le16()
fix spacing
Changes from RFC:
Adjust for struct changes
adjust for unaligned fields
---
tools/testing/cxl/test/events.c | 73 +++++++++++++++++++++++++++++++++
1 file changed, 73 insertions(+)
Comments
On 11/30/2022 5:27 PM, ira.weiny@intel.com wrote:
> From: Ira Weiny <ira.weiny@intel.com>
>
> Each type of event has different trace point outputs.
>
> Add mock General Media Event, DRAM event, and Memory Module Event
> records to the mock list of events returned.
>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
>
> ---
> Changes from V1:
> Jonathan
> use put_unaligned_le16()
> fix spacing
>
> Changes from RFC:
> Adjust for struct changes
> adjust for unaligned fields
> ---
> tools/testing/cxl/test/events.c | 73 +++++++++++++++++++++++++++++++++
> 1 file changed, 73 insertions(+)
>
> diff --git a/tools/testing/cxl/test/events.c b/tools/testing/cxl/test/events.c
> index a3d2ec7cc9fe..0bcc485e07da 100644
> --- a/tools/testing/cxl/test/events.c
> +++ b/tools/testing/cxl/test/events.c
> @@ -206,6 +206,66 @@ struct cxl_event_record_raw hardware_replace = {
> .data = { 0xDE, 0xAD, 0xBE, 0xEF },
> };
>
> +struct cxl_event_gen_media gen_media = {
> + .hdr = {
> + .id = UUID_INIT(0xfbcd0a77, 0xc260, 0x417f,
> + 0x85, 0xa9, 0x08, 0x8b, 0x16, 0x21, 0xeb, 0xa6),
> + .length = sizeof(struct cxl_event_gen_media),
> + .flags[0] = CXL_EVENT_RECORD_FLAG_PERMANENT,
> + /* .handle = Set dynamically */
> + .related_handle = cpu_to_le16(0),
> + },
> + .phys_addr = cpu_to_le64(0x2000),
> + .descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,
> + .type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,
> + .transaction_type = CXL_GMER_TRANS_HOST_WRITE,
> + /* .validity_flags = <set below> */
> + .channel = 1,
> + .rank = 30
> +};
> +
> +struct cxl_event_dram dram = {
> + .hdr = {
> + .id = UUID_INIT(0x601dcbb3, 0x9c06, 0x4eab,
> + 0xb8, 0xaf, 0x4e, 0x9b, 0xfb, 0x5c, 0x96, 0x24),
> + .length = sizeof(struct cxl_event_dram),
> + .flags[0] = CXL_EVENT_RECORD_FLAG_PERF_DEGRADED,
> + /* .handle = Set dynamically */
> + .related_handle = cpu_to_le16(0),
> + },
> + .phys_addr = cpu_to_le64(0x8000),
> + .descriptor = CXL_GMER_EVT_DESC_THRESHOLD_EVENT,
> + .type = CXL_GMER_MEM_EVT_TYPE_INV_ADDR,
> + .transaction_type = CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB,
> + /* .validity_flags = <set below> */
> + .channel = 1,
> + .bank_group = 5,
> + .bank = 2,
> + .column = {0xDE, 0xAD},
> +};
> +
> +struct cxl_event_mem_module mem_module = {
> + .hdr = {
> + .id = UUID_INIT(0xfe927475, 0xdd59, 0x4339,
> + 0xa5, 0x86, 0x79, 0xba, 0xb1, 0x13, 0xb7, 0x74),
> + .length = sizeof(struct cxl_event_mem_module),
> + /* .handle = Set dynamically */
> + .related_handle = cpu_to_le16(0),
> + },
> + .event_type = CXL_MMER_TEMP_CHANGE,
> + .info = {
> + .health_status = CXL_DHI_HS_PERFORMANCE_DEGRADED,
> + .media_status = CXL_DHI_MS_ALL_DATA_LOST,
> + .add_status = (CXL_DHI_AS_CRITICAL << 2) |
> + (CXL_DHI_AS_WARNING << 4) |
> + (CXL_DHI_AS_WARNING << 5),
> + .device_temp = { 0xDE, 0xAD},
> + .dirty_shutdown_cnt = { 0xde, 0xad, 0xbe, 0xef },
> + .cor_vol_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
> + .cor_per_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
> + }
> +};
> +
> u32 cxl_mock_add_event_logs(struct cxl_dev_state *cxlds)
> {
> struct device *dev = cxlds->dev;
> @@ -223,10 +283,23 @@ u32 cxl_mock_add_event_logs(struct cxl_dev_state *cxlds)
> return 0;
> }
>
> + put_unaligned_le16(CXL_GMER_VALID_CHANNEL | CXL_GMER_VALID_RANK,
> + &gen_media.validity_flags);
> +
> + put_unaligned_le16(CXL_DER_VALID_CHANNEL | CXL_DER_VALID_BANK_GROUP |
> + CXL_DER_VALID_BANK | CXL_DER_VALID_COLUMN,
> + &dram.validity_flags);
> +
> event_store_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed);
> + event_store_add_event(mes, CXL_EVENT_TYPE_INFO,
> + (struct cxl_event_record_raw *)&gen_media);
> + event_store_add_event(mes, CXL_EVENT_TYPE_INFO,
> + (struct cxl_event_record_raw *)&mem_module);
> mes->ev_status |= CXLDEV_EVENT_STATUS_INFO;
>
> event_store_add_event(mes, CXL_EVENT_TYPE_FATAL, &hardware_replace);
> + event_store_add_event(mes, CXL_EVENT_TYPE_FATAL,
> + (struct cxl_event_record_raw *)&dram);
> mes->ev_status |= CXLDEV_EVENT_STATUS_FATAL;
>
> return mes->ev_status;
@@ -206,6 +206,66 @@ struct cxl_event_record_raw hardware_replace = {
.data = { 0xDE, 0xAD, 0xBE, 0xEF },
};
+struct cxl_event_gen_media gen_media = {
+ .hdr = {
+ .id = UUID_INIT(0xfbcd0a77, 0xc260, 0x417f,
+ 0x85, 0xa9, 0x08, 0x8b, 0x16, 0x21, 0xeb, 0xa6),
+ .length = sizeof(struct cxl_event_gen_media),
+ .flags[0] = CXL_EVENT_RECORD_FLAG_PERMANENT,
+ /* .handle = Set dynamically */
+ .related_handle = cpu_to_le16(0),
+ },
+ .phys_addr = cpu_to_le64(0x2000),
+ .descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,
+ .type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,
+ .transaction_type = CXL_GMER_TRANS_HOST_WRITE,
+ /* .validity_flags = <set below> */
+ .channel = 1,
+ .rank = 30
+};
+
+struct cxl_event_dram dram = {
+ .hdr = {
+ .id = UUID_INIT(0x601dcbb3, 0x9c06, 0x4eab,
+ 0xb8, 0xaf, 0x4e, 0x9b, 0xfb, 0x5c, 0x96, 0x24),
+ .length = sizeof(struct cxl_event_dram),
+ .flags[0] = CXL_EVENT_RECORD_FLAG_PERF_DEGRADED,
+ /* .handle = Set dynamically */
+ .related_handle = cpu_to_le16(0),
+ },
+ .phys_addr = cpu_to_le64(0x8000),
+ .descriptor = CXL_GMER_EVT_DESC_THRESHOLD_EVENT,
+ .type = CXL_GMER_MEM_EVT_TYPE_INV_ADDR,
+ .transaction_type = CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB,
+ /* .validity_flags = <set below> */
+ .channel = 1,
+ .bank_group = 5,
+ .bank = 2,
+ .column = {0xDE, 0xAD},
+};
+
+struct cxl_event_mem_module mem_module = {
+ .hdr = {
+ .id = UUID_INIT(0xfe927475, 0xdd59, 0x4339,
+ 0xa5, 0x86, 0x79, 0xba, 0xb1, 0x13, 0xb7, 0x74),
+ .length = sizeof(struct cxl_event_mem_module),
+ /* .handle = Set dynamically */
+ .related_handle = cpu_to_le16(0),
+ },
+ .event_type = CXL_MMER_TEMP_CHANGE,
+ .info = {
+ .health_status = CXL_DHI_HS_PERFORMANCE_DEGRADED,
+ .media_status = CXL_DHI_MS_ALL_DATA_LOST,
+ .add_status = (CXL_DHI_AS_CRITICAL << 2) |
+ (CXL_DHI_AS_WARNING << 4) |
+ (CXL_DHI_AS_WARNING << 5),
+ .device_temp = { 0xDE, 0xAD},
+ .dirty_shutdown_cnt = { 0xde, 0xad, 0xbe, 0xef },
+ .cor_vol_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
+ .cor_per_err_cnt = { 0xde, 0xad, 0xbe, 0xef },
+ }
+};
+
u32 cxl_mock_add_event_logs(struct cxl_dev_state *cxlds)
{
struct device *dev = cxlds->dev;
@@ -223,10 +283,23 @@ u32 cxl_mock_add_event_logs(struct cxl_dev_state *cxlds)
return 0;
}
+ put_unaligned_le16(CXL_GMER_VALID_CHANNEL | CXL_GMER_VALID_RANK,
+ &gen_media.validity_flags);
+
+ put_unaligned_le16(CXL_DER_VALID_CHANNEL | CXL_DER_VALID_BANK_GROUP |
+ CXL_DER_VALID_BANK | CXL_DER_VALID_COLUMN,
+ &dram.validity_flags);
+
event_store_add_event(mes, CXL_EVENT_TYPE_INFO, &maint_needed);
+ event_store_add_event(mes, CXL_EVENT_TYPE_INFO,
+ (struct cxl_event_record_raw *)&gen_media);
+ event_store_add_event(mes, CXL_EVENT_TYPE_INFO,
+ (struct cxl_event_record_raw *)&mem_module);
mes->ev_status |= CXLDEV_EVENT_STATUS_INFO;
event_store_add_event(mes, CXL_EVENT_TYPE_FATAL, &hardware_replace);
+ event_store_add_event(mes, CXL_EVENT_TYPE_FATAL,
+ (struct cxl_event_record_raw *)&dram);
mes->ev_status |= CXLDEV_EVENT_STATUS_FATAL;
return mes->ev_status;