From patchwork Thu Nov 24 12:38:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 25504 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3371640wrr; Thu, 24 Nov 2022 04:41:39 -0800 (PST) X-Google-Smtp-Source: AA0mqf4v5ZaAmxswnQ+DiRPVs/TUw04GJOmoqxPj5+RN9vBuL+otLPIqkpLM0gW9corBoGODrbRK X-Received: by 2002:aa7:9388:0:b0:56d:4c7e:777a with SMTP id t8-20020aa79388000000b0056d4c7e777amr35604373pfe.0.1669293698709; Thu, 24 Nov 2022 04:41:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669293698; cv=none; d=google.com; s=arc-20160816; b=G1aQLc2ktdPQ63F7odUbIIlcBmS77zr70wiioE21RlHXnwn/SalwA6eyC31+nglLoo CSyxp7fNSO3mWgd68vyZOohUh+Agcsq/L3etBsyN+HhiBs6Osp0lcuDrDiG4tYXPBUwC WcFQCutbUUihSu6dXvbD5gn5EljVMcdiADe0O63sFqj5xUFR1k/RRO38exzZFSab7sFB uBLumfzZNoSUyMYULYNsrbqcAiw5GjJ00hRdlt7oQuDSBBAJSKwoDBo2IrHyLuZ3mcbm 1DUiLzr3M/GdI3coIO8svtuO1VZ8rbOfK03MwqdfPGTH1TwFBla1IKIVLSMlTOBzFiXn dIRA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=cZSSBBkcbrqgVM6xn5x3Ly4KlOeHL0tRZJLkClCQdYM=; b=zqqEUCVCEvme+jyWGa+KYXiGHqqaeCuiJ8Z99HkkYZD4uf1s8LNj2wX+aaJo3Fev33 DLpwm9G4D/xyWH8OEljwXU+KfQTlDCcRs4ZYgupExK+Cg6ZXi7l5RtadiVy6SMTJmiug djbxUu/ChM3bDWf9oKs9L8UsQIElLR2yEsMPYkNeQgzNoDB9CeiqD8ltPoW5FeBnysrK ZYYqkSoAil81pqZ/r4mseBFp0xuhmxr/xCPQaORFvGj4FIkUbufkfI4VBo4RUZG0v86G WpOze8OUH5YmbnQJljHQe19A0WoUBNIS9STqgFpEMVTtpyoze9L0YbDSkyeLf0rfEHF8 JOFw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=YjtnSBAn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id e23-20020a656897000000b0041183daa0ffsi393963pgt.761.2022.11.24.04.41.24; Thu, 24 Nov 2022 04:41:38 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=YjtnSBAn; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229880AbiKXMjo (ORCPT + 99 others); Thu, 24 Nov 2022 07:39:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51302 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229791AbiKXMjR (ORCPT ); Thu, 24 Nov 2022 07:39:17 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5412E8CF28; Thu, 24 Nov 2022 04:39:14 -0800 (PST) X-UUID: f709b1f607f64045aa35b16e61793796-20221124 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=cZSSBBkcbrqgVM6xn5x3Ly4KlOeHL0tRZJLkClCQdYM=; b=YjtnSBAnLmksWgF4gQSaej2/+2rTw07yqb4cAaRUzuW+KnpbKAAyV7MPJinNdHa4TV4m9Yp3mMWbUFpP3d4qNoCXuDV46TjcgdwNtkufXmJBS8YfNvZld4gOJ5l5WzG3YIyZ+V1aX29x6xK40Ni0c9pi8fZbaCa4D7bUaTPYdXk=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14,REQID:db2535d1-d996-4b82-b0bb-d83982eb186e,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:dcaaed0,CLOUDID:988c25dc-6ad4-42ff-91f3-18e0272db660,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: f709b1f607f64045aa35b16e61793796-20221124 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 685729129; Thu, 24 Nov 2022 20:39:02 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.3; Thu, 24 Nov 2022 20:39:01 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 24 Nov 2022 20:39:02 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Matthias Brugger , Hans Verkuil CC: Chun-Kuang Hu , , , , , Moudy Ho Subject: [PATCH v4 4/9] media: platform: mtk-mdp3: chip config split about color format Date: Thu, 24 Nov 2022 20:38:54 +0800 Message-ID: <20221124123859.24395-5-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221124123859.24395-1-moudy.ho@mediatek.com> References: <20221124123859.24395-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750381309503979514?= X-GMAIL-MSGID: =?utf-8?q?1750381309503979514?= Due to differences in hardware design, the supported color formats will vary and should be moved and integrated into the chip configuration header file. Signed-off-by: Moudy Ho --- .../mediatek/mdp3/mt8183/mdp3-plat-mt8183.h | 225 +++++++++++++++ .../platform/mediatek/mdp3/mtk-mdp3-core.c | 2 + .../platform/mediatek/mdp3/mtk-mdp3-core.h | 2 + .../platform/mediatek/mdp3/mtk-mdp3-m2m.c | 10 +- .../platform/mediatek/mdp3/mtk-mdp3-regs.c | 262 ++---------------- .../platform/mediatek/mdp3/mtk-mdp3-regs.h | 9 +- 6 files changed, 261 insertions(+), 249 deletions(-) diff --git a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h index a4bfde4a9e16..1be9cc55b9b5 100644 --- a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h +++ b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h @@ -155,4 +155,229 @@ static const struct mdp_comp_data mt8183_mdp_comp_data[MDP_MAX_COMP_COUNT] = { }, }; +/* + * All 10-bit related formats are not added in the basic format list, + * please add the corresponding format settings before use. + */ +static const struct mdp_format mt8183_formats[] = { + { + .pixelformat = V4L2_PIX_FMT_GREY, + .mdp_color = MDP_COLOR_GREY, + .depth = { 8 }, + .row_depth = { 8 }, + .num_planes = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_RGB565X, + .mdp_color = MDP_COLOR_BGR565, + .depth = { 16 }, + .row_depth = { 16 }, + .num_planes = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_RGB565, + .mdp_color = MDP_COLOR_RGB565, + .depth = { 16 }, + .row_depth = { 16 }, + .num_planes = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_RGB24, + .mdp_color = MDP_COLOR_RGB888, + .depth = { 24 }, + .row_depth = { 24 }, + .num_planes = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_BGR24, + .mdp_color = MDP_COLOR_BGR888, + .depth = { 24 }, + .row_depth = { 24 }, + .num_planes = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_ABGR32, + .mdp_color = MDP_COLOR_BGRA8888, + .depth = { 32 }, + .row_depth = { 32 }, + .num_planes = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_ARGB32, + .mdp_color = MDP_COLOR_ARGB8888, + .depth = { 32 }, + .row_depth = { 32 }, + .num_planes = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_UYVY, + .mdp_color = MDP_COLOR_UYVY, + .depth = { 16 }, + .row_depth = { 16 }, + .num_planes = 1, + .walign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_VYUY, + .mdp_color = MDP_COLOR_VYUY, + .depth = { 16 }, + .row_depth = { 16 }, + .num_planes = 1, + .walign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_YUYV, + .mdp_color = MDP_COLOR_YUYV, + .depth = { 16 }, + .row_depth = { 16 }, + .num_planes = 1, + .walign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_YVYU, + .mdp_color = MDP_COLOR_YVYU, + .depth = { 16 }, + .row_depth = { 16 }, + .num_planes = 1, + .walign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_YUV420, + .mdp_color = MDP_COLOR_I420, + .depth = { 12 }, + .row_depth = { 8 }, + .num_planes = 1, + .walign = 1, + .halign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_YVU420, + .mdp_color = MDP_COLOR_YV12, + .depth = { 12 }, + .row_depth = { 8 }, + .num_planes = 1, + .walign = 1, + .halign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_NV12, + .mdp_color = MDP_COLOR_NV12, + .depth = { 12 }, + .row_depth = { 8 }, + .num_planes = 1, + .walign = 1, + .halign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_NV21, + .mdp_color = MDP_COLOR_NV21, + .depth = { 12 }, + .row_depth = { 8 }, + .num_planes = 1, + .walign = 1, + .halign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_NV16, + .mdp_color = MDP_COLOR_NV16, + .depth = { 16 }, + .row_depth = { 8 }, + .num_planes = 1, + .walign = 1, + .flags = MDP_FMT_FLAG_OUTPUT, + }, { + .pixelformat = V4L2_PIX_FMT_NV61, + .mdp_color = MDP_COLOR_NV61, + .depth = { 16 }, + .row_depth = { 8 }, + .num_planes = 1, + .walign = 1, + .flags = MDP_FMT_FLAG_OUTPUT, + }, { + .pixelformat = V4L2_PIX_FMT_NV24, + .mdp_color = MDP_COLOR_NV24, + .depth = { 24 }, + .row_depth = { 8 }, + .num_planes = 1, + .flags = MDP_FMT_FLAG_OUTPUT, + }, { + .pixelformat = V4L2_PIX_FMT_NV42, + .mdp_color = MDP_COLOR_NV42, + .depth = { 24 }, + .row_depth = { 8 }, + .num_planes = 1, + .flags = MDP_FMT_FLAG_OUTPUT, + }, { + .pixelformat = V4L2_PIX_FMT_MT21C, + .mdp_color = MDP_COLOR_420_BLK_UFO, + .depth = { 8, 4 }, + .row_depth = { 8, 8 }, + .num_planes = 2, + .walign = 4, + .halign = 5, + .flags = MDP_FMT_FLAG_OUTPUT, + }, { + .pixelformat = V4L2_PIX_FMT_MM21, + .mdp_color = MDP_COLOR_420_BLK, + .depth = { 8, 4 }, + .row_depth = { 8, 8 }, + .num_planes = 2, + .walign = 4, + .halign = 5, + .flags = MDP_FMT_FLAG_OUTPUT, + }, { + .pixelformat = V4L2_PIX_FMT_NV12M, + .mdp_color = MDP_COLOR_NV12, + .depth = { 8, 4 }, + .row_depth = { 8, 8 }, + .num_planes = 2, + .walign = 1, + .halign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_NV21M, + .mdp_color = MDP_COLOR_NV21, + .depth = { 8, 4 }, + .row_depth = { 8, 8 }, + .num_planes = 2, + .walign = 1, + .halign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_NV16M, + .mdp_color = MDP_COLOR_NV16, + .depth = { 8, 8 }, + .row_depth = { 8, 8 }, + .num_planes = 2, + .walign = 1, + .flags = MDP_FMT_FLAG_OUTPUT, + }, { + .pixelformat = V4L2_PIX_FMT_NV61M, + .mdp_color = MDP_COLOR_NV61, + .depth = { 8, 8 }, + .row_depth = { 8, 8 }, + .num_planes = 2, + .walign = 1, + .flags = MDP_FMT_FLAG_OUTPUT, + }, { + .pixelformat = V4L2_PIX_FMT_YUV420M, + .mdp_color = MDP_COLOR_I420, + .depth = { 8, 2, 2 }, + .row_depth = { 8, 4, 4 }, + .num_planes = 3, + .walign = 1, + .halign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + }, { + .pixelformat = V4L2_PIX_FMT_YVU420M, + .mdp_color = MDP_COLOR_YV12, + .depth = { 8, 2, 2 }, + .row_depth = { 8, 4, 4 }, + .num_planes = 3, + .walign = 1, + .halign = 1, + .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, + } +}; + #endif /* __MDP3_PLAT_MT8183_H__ */ diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c index 277253c8c963..ce18cbf70e96 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c @@ -24,6 +24,8 @@ static const struct mtk_mdp_driver_data mt8183_mdp_driver_data = { .mdp_mutex_table_idx = mt8183_mutex_idx, .comp_data = mt8183_mdp_comp_data, .comp_data_len = ARRAY_SIZE(mt8183_mdp_comp_data), + .format = mt8183_formats, + .format_len = ARRAY_SIZE(mt8183_formats), }; static const struct of_device_id mdp_of_ids[] = { diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h index b83b2c517730..982438a9ab02 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h @@ -57,6 +57,8 @@ struct mtk_mdp_driver_data { const u32 *mdp_mutex_table_idx; const struct mdp_comp_data *comp_data; unsigned int comp_data_len; + const struct mdp_format *format; + unsigned int format_len; }; struct mdp_dev { diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c index 5f74ea3b7a52..7c14679ffd78 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-m2m.c @@ -277,7 +277,9 @@ static int mdp_m2m_querycap(struct file *file, void *fh, static int mdp_m2m_enum_fmt_mplane(struct file *file, void *fh, struct v4l2_fmtdesc *f) { - return mdp_enum_fmt_mplane(f); + struct mdp_m2m_ctx *ctx = fh_to_ctx(fh); + + return mdp_enum_fmt_mplane(ctx->mdp_dev, f); } static int mdp_m2m_g_fmt_mplane(struct file *file, void *fh, @@ -307,7 +309,7 @@ static int mdp_m2m_s_fmt_mplane(struct file *file, void *fh, const struct mdp_format *fmt; struct vb2_queue *vq; - fmt = mdp_try_fmt_mplane(f, &ctx->curr_param, ctx->id); + fmt = mdp_try_fmt_mplane(ctx->mdp_dev, f, &ctx->curr_param, ctx->id); if (!fmt) return -EINVAL; @@ -346,7 +348,7 @@ static int mdp_m2m_try_fmt_mplane(struct file *file, void *fh, { struct mdp_m2m_ctx *ctx = fh_to_ctx(fh); - if (!mdp_try_fmt_mplane(f, &ctx->curr_param, ctx->id)) + if (!mdp_try_fmt_mplane(ctx->mdp_dev, f, &ctx->curr_param, ctx->id)) return -EINVAL; return 0; @@ -589,7 +591,7 @@ static int mdp_m2m_open(struct file *file) ctx->fh.m2m_ctx = ctx->m2m_ctx; ctx->curr_param.ctx = ctx; - ret = mdp_frameparam_init(&ctx->curr_param); + ret = mdp_frameparam_init(mdp, &ctx->curr_param); if (ret) { dev_err(dev, "Failed to initialize mdp parameter\n"); goto err_release_m2m_ctx; diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c index 4e84a37ecdfc..cd6afbf53797 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.c @@ -11,231 +11,6 @@ #include "mtk-mdp3-regs.h" #include "mtk-mdp3-m2m.h" -/* - * All 10-bit related formats are not added in the basic format list, - * please add the corresponding format settings before use. - */ -static const struct mdp_format mdp_formats[] = { - { - .pixelformat = V4L2_PIX_FMT_GREY, - .mdp_color = MDP_COLOR_GREY, - .depth = { 8 }, - .row_depth = { 8 }, - .num_planes = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_RGB565X, - .mdp_color = MDP_COLOR_BGR565, - .depth = { 16 }, - .row_depth = { 16 }, - .num_planes = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_RGB565, - .mdp_color = MDP_COLOR_RGB565, - .depth = { 16 }, - .row_depth = { 16 }, - .num_planes = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_RGB24, - .mdp_color = MDP_COLOR_RGB888, - .depth = { 24 }, - .row_depth = { 24 }, - .num_planes = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_BGR24, - .mdp_color = MDP_COLOR_BGR888, - .depth = { 24 }, - .row_depth = { 24 }, - .num_planes = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_ABGR32, - .mdp_color = MDP_COLOR_BGRA8888, - .depth = { 32 }, - .row_depth = { 32 }, - .num_planes = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_ARGB32, - .mdp_color = MDP_COLOR_ARGB8888, - .depth = { 32 }, - .row_depth = { 32 }, - .num_planes = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_UYVY, - .mdp_color = MDP_COLOR_UYVY, - .depth = { 16 }, - .row_depth = { 16 }, - .num_planes = 1, - .walign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_VYUY, - .mdp_color = MDP_COLOR_VYUY, - .depth = { 16 }, - .row_depth = { 16 }, - .num_planes = 1, - .walign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_YUYV, - .mdp_color = MDP_COLOR_YUYV, - .depth = { 16 }, - .row_depth = { 16 }, - .num_planes = 1, - .walign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_YVYU, - .mdp_color = MDP_COLOR_YVYU, - .depth = { 16 }, - .row_depth = { 16 }, - .num_planes = 1, - .walign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_YUV420, - .mdp_color = MDP_COLOR_I420, - .depth = { 12 }, - .row_depth = { 8 }, - .num_planes = 1, - .walign = 1, - .halign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_YVU420, - .mdp_color = MDP_COLOR_YV12, - .depth = { 12 }, - .row_depth = { 8 }, - .num_planes = 1, - .walign = 1, - .halign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_NV12, - .mdp_color = MDP_COLOR_NV12, - .depth = { 12 }, - .row_depth = { 8 }, - .num_planes = 1, - .walign = 1, - .halign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_NV21, - .mdp_color = MDP_COLOR_NV21, - .depth = { 12 }, - .row_depth = { 8 }, - .num_planes = 1, - .walign = 1, - .halign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_NV16, - .mdp_color = MDP_COLOR_NV16, - .depth = { 16 }, - .row_depth = { 8 }, - .num_planes = 1, - .walign = 1, - .flags = MDP_FMT_FLAG_OUTPUT, - }, { - .pixelformat = V4L2_PIX_FMT_NV61, - .mdp_color = MDP_COLOR_NV61, - .depth = { 16 }, - .row_depth = { 8 }, - .num_planes = 1, - .walign = 1, - .flags = MDP_FMT_FLAG_OUTPUT, - }, { - .pixelformat = V4L2_PIX_FMT_NV24, - .mdp_color = MDP_COLOR_NV24, - .depth = { 24 }, - .row_depth = { 8 }, - .num_planes = 1, - .flags = MDP_FMT_FLAG_OUTPUT, - }, { - .pixelformat = V4L2_PIX_FMT_NV42, - .mdp_color = MDP_COLOR_NV42, - .depth = { 24 }, - .row_depth = { 8 }, - .num_planes = 1, - .flags = MDP_FMT_FLAG_OUTPUT, - }, { - .pixelformat = V4L2_PIX_FMT_MT21C, - .mdp_color = MDP_COLOR_420_BLK_UFO, - .depth = { 8, 4 }, - .row_depth = { 8, 8 }, - .num_planes = 2, - .walign = 4, - .halign = 5, - .flags = MDP_FMT_FLAG_OUTPUT, - }, { - .pixelformat = V4L2_PIX_FMT_MM21, - .mdp_color = MDP_COLOR_420_BLK, - .depth = { 8, 4 }, - .row_depth = { 8, 8 }, - .num_planes = 2, - .walign = 4, - .halign = 5, - .flags = MDP_FMT_FLAG_OUTPUT, - }, { - .pixelformat = V4L2_PIX_FMT_NV12M, - .mdp_color = MDP_COLOR_NV12, - .depth = { 8, 4 }, - .row_depth = { 8, 8 }, - .num_planes = 2, - .walign = 1, - .halign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_NV21M, - .mdp_color = MDP_COLOR_NV21, - .depth = { 8, 4 }, - .row_depth = { 8, 8 }, - .num_planes = 2, - .walign = 1, - .halign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_NV16M, - .mdp_color = MDP_COLOR_NV16, - .depth = { 8, 8 }, - .row_depth = { 8, 8 }, - .num_planes = 2, - .walign = 1, - .flags = MDP_FMT_FLAG_OUTPUT, - }, { - .pixelformat = V4L2_PIX_FMT_NV61M, - .mdp_color = MDP_COLOR_NV61, - .depth = { 8, 8 }, - .row_depth = { 8, 8 }, - .num_planes = 2, - .walign = 1, - .flags = MDP_FMT_FLAG_OUTPUT, - }, { - .pixelformat = V4L2_PIX_FMT_YUV420M, - .mdp_color = MDP_COLOR_I420, - .depth = { 8, 2, 2 }, - .row_depth = { 8, 4, 4 }, - .num_planes = 3, - .walign = 1, - .halign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - }, { - .pixelformat = V4L2_PIX_FMT_YVU420M, - .mdp_color = MDP_COLOR_YV12, - .depth = { 8, 2, 2 }, - .row_depth = { 8, 4, 4 }, - .num_planes = 3, - .walign = 1, - .halign = 1, - .flags = MDP_FMT_FLAG_OUTPUT | MDP_FMT_FLAG_CAPTURE, - } -}; - static const struct mdp_limit mdp_def_limit = { .out_limit = { .wmin = 16, @@ -255,32 +30,34 @@ static const struct mdp_limit mdp_def_limit = { .v_scale_down_max = 128, }; -static const struct mdp_format *mdp_find_fmt(u32 pixelformat, u32 type) +static const struct mdp_format *mdp_find_fmt(const struct mtk_mdp_driver_data *mdp_data, + u32 pixelformat, u32 type) { u32 i, flag; flag = V4L2_TYPE_IS_OUTPUT(type) ? MDP_FMT_FLAG_OUTPUT : MDP_FMT_FLAG_CAPTURE; - for (i = 0; i < ARRAY_SIZE(mdp_formats); ++i) { - if (!(mdp_formats[i].flags & flag)) + for (i = 0; i < mdp_data->format_len; ++i) { + if (!(mdp_data->format[i].flags & flag)) continue; - if (mdp_formats[i].pixelformat == pixelformat) - return &mdp_formats[i]; + if (mdp_data->format[i].pixelformat == pixelformat) + return &mdp_data->format[i]; } return NULL; } -static const struct mdp_format *mdp_find_fmt_by_index(u32 index, u32 type) +static const struct mdp_format *mdp_find_fmt_by_index(const struct mtk_mdp_driver_data *mdp_data, + u32 index, u32 type) { u32 i, flag, num = 0; flag = V4L2_TYPE_IS_OUTPUT(type) ? MDP_FMT_FLAG_OUTPUT : MDP_FMT_FLAG_CAPTURE; - for (i = 0; i < ARRAY_SIZE(mdp_formats); ++i) { - if (!(mdp_formats[i].flags & flag)) + for (i = 0; i < mdp_data->format_len; ++i) { + if (!(mdp_data->format[i].flags & flag)) continue; if (index == num) - return &mdp_formats[i]; + return &mdp_data->format[i]; num++; } return NULL; @@ -354,11 +131,11 @@ static int mdp_clamp_align(s32 *x, int min, int max, unsigned int align) return 0; } -int mdp_enum_fmt_mplane(struct v4l2_fmtdesc *f) +int mdp_enum_fmt_mplane(struct mdp_dev *mdp, struct v4l2_fmtdesc *f) { const struct mdp_format *fmt; - fmt = mdp_find_fmt_by_index(f->index, f->type); + fmt = mdp_find_fmt_by_index(mdp->mdp_data, f->index, f->type); if (!fmt) return -EINVAL; @@ -366,7 +143,8 @@ int mdp_enum_fmt_mplane(struct v4l2_fmtdesc *f) return 0; } -const struct mdp_format *mdp_try_fmt_mplane(struct v4l2_format *f, +const struct mdp_format *mdp_try_fmt_mplane(struct mdp_dev *mdp, + struct v4l2_format *f, struct mdp_frameparam *param, u32 ctx_id) { @@ -378,9 +156,9 @@ const struct mdp_format *mdp_try_fmt_mplane(struct v4l2_format *f, u32 org_w, org_h; unsigned int i; - fmt = mdp_find_fmt(pix_mp->pixelformat, f->type); + fmt = mdp_find_fmt(mdp->mdp_data, pix_mp->pixelformat, f->type); if (!fmt) { - fmt = mdp_find_fmt_by_index(0, f->type); + fmt = mdp_find_fmt_by_index(mdp->mdp_data, 0, f->type); if (!fmt) { dev_dbg(dev, "%d: pixelformat %c%c%c%c invalid", ctx_id, (pix_mp->pixelformat & 0xff), @@ -699,7 +477,7 @@ void mdp_set_dst_config(struct img_output *out, mdp_set_orientation(out, frame->rotation, frame->hflip, frame->vflip); } -int mdp_frameparam_init(struct mdp_frameparam *param) +int mdp_frameparam_init(struct mdp_dev *mdp, struct mdp_frameparam *param) { struct mdp_frame *frame; @@ -712,7 +490,7 @@ int mdp_frameparam_init(struct mdp_frameparam *param) frame = ¶m->output; frame->format.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE; - frame->mdp_fmt = mdp_try_fmt_mplane(&frame->format, param, 0); + frame->mdp_fmt = mdp_try_fmt_mplane(mdp, &frame->format, param, 0); frame->ycbcr_prof = mdp_map_ycbcr_prof_mplane(&frame->format, frame->mdp_fmt->mdp_color); @@ -721,7 +499,7 @@ int mdp_frameparam_init(struct mdp_frameparam *param) param->num_captures = 1; frame = ¶m->captures[0]; frame->format.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE; - frame->mdp_fmt = mdp_try_fmt_mplane(&frame->format, param, 0); + frame->mdp_fmt = mdp_try_fmt_mplane(mdp, &frame->format, param, 0); frame->ycbcr_prof = mdp_map_ycbcr_prof_mplane(&frame->format, frame->mdp_fmt->mdp_color); diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.h index f995e536d45f..8e91bcb094e0 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.h +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-regs.h @@ -353,8 +353,11 @@ struct mdp_frameparam { enum v4l2_quantization quant; }; -int mdp_enum_fmt_mplane(struct v4l2_fmtdesc *f); -const struct mdp_format *mdp_try_fmt_mplane(struct v4l2_format *f, +struct mdp_dev; + +int mdp_enum_fmt_mplane(struct mdp_dev *mdp, struct v4l2_fmtdesc *f); +const struct mdp_format *mdp_try_fmt_mplane(struct mdp_dev *mdp, + struct v4l2_format *f, struct mdp_frameparam *param, u32 ctx_id); enum mdp_ycbcr_profile mdp_map_ycbcr_prof_mplane(struct v4l2_format *f, @@ -368,6 +371,6 @@ void mdp_set_src_config(struct img_input *in, struct mdp_frame *frame, struct vb2_buffer *vb); void mdp_set_dst_config(struct img_output *out, struct mdp_frame *frame, struct vb2_buffer *vb); -int mdp_frameparam_init(struct mdp_frameparam *param); +int mdp_frameparam_init(struct mdp_dev *mdp, struct mdp_frameparam *param); #endif /* __MTK_MDP3_REGS_H__ */