From patchwork Thu Nov 24 12:38:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TW91ZHkgSG8gKOS9leWul+WOnyk=?= X-Patchwork-Id: 25497 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp3371027wrr; Thu, 24 Nov 2022 04:40:15 -0800 (PST) X-Google-Smtp-Source: AA0mqf72ajYsoCtWuivYQwnusPy+fAzkNY+otUuOVBiuDbZ9mN4fzAUE5ZMWvXe3CHJQEM2dL0zE X-Received: by 2002:a17:90a:b78b:b0:218:b258:f5a9 with SMTP id m11-20020a17090ab78b00b00218b258f5a9mr19494735pjr.173.1669293615243; Thu, 24 Nov 2022 04:40:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669293615; cv=none; d=google.com; s=arc-20160816; b=r9zjh4YzSeTOhH6qxcvLyxMz951WeQ+o/3vmw/G6HBd3VrJdV7cfvDBnl5C0LeMsOv hlTCJpJdGwiODaAR9AwM6GxkLwFCQ8LRUpA+SbHtYJLoN28GE7/Mnawbn/GigNhQEK05 wkdojI3GkmppDKjF2SV513DY8Z7WkfpzEBS2jpWy2Mm11BhGsBGan5W200tFqRukxLOu cUwY1LokJiYu1/cIq178aSXG3hNJ/GVHjB1ihDlLdiAKzU+nrRW97evPqUOgm53Bts0W yvqy6jb1OaHn0pGHnyFBJDiuOnUWb0ze/70YyUlfeDd2HZ200asqSESFogxDCWfimeGj Phaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=jyEudgx7WcgyCeL9KzWF01BbZwIXIznkx+/V9+/fATw=; b=dDsVSjFV88FUj/519yI5snLSGsbAbwArQX+bHnaJjLMxDsi7vwptREPLlAYtCB0lOh wcghrH4rY7dB6KEQ7UzfoaFUXzTd93SENM2t6SBbPSFC3iAokYj+DpqLBwSO9fUTY7EZ 7F5TXe5TAPdYJYQD0hhoBmpLa+ZI2PiKaObAmsAZW37alJNI72MLnZoWrpdvRJOrmIQt ZLqcP1ssIpqwbWlrGjZSaR/W6ed6G4zOKjnG/yJsMO0pvnCoKATGs1LvR6jOcJOgdFmP 6UrbDbf0sASnZWIIuDMnvpgQqiyvoIU4Cp8Wbw9nqiJzNNIaGWL4uwbeR35EV8ph5rKS 0xBw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=IhIZu9CF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id iw14-20020a170903044e00b00188fc3a3fb1si936104plb.184.2022.11.24.04.40.00; Thu, 24 Nov 2022 04:40:15 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=IhIZu9CF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229804AbiKXMjS (ORCPT + 99 others); Thu, 24 Nov 2022 07:39:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51208 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229748AbiKXMjK (ORCPT ); Thu, 24 Nov 2022 07:39:10 -0500 Received: from mailgw01.mediatek.com (unknown [60.244.123.138]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66CA985159; Thu, 24 Nov 2022 04:39:09 -0800 (PST) X-UUID: 68063e0f8bcd439e8365c3eeee26d99c-20221124 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=jyEudgx7WcgyCeL9KzWF01BbZwIXIznkx+/V9+/fATw=; b=IhIZu9CF0iWQxPZV25Zr+l7iA1lBXQ4SLOJpYOMtwdrwjUPnh0BpPsqFod2itmLoZqOjVNGqvDQgR3GFQ57VtCVyw2StHC4sabdcdl7CIl9gq2tXi2Yo4X5Wlr2tFwsZA/6AHTyX6jfclsusvcFJRuuW95B5wF0Z7z/YGUV7oIs=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.14,REQID:8b131942-5adf-4ace-afbf-e42c479e3421,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:dcaaed0,CLOUDID:cfecba2f-2938-482e-aafd-98d66723b8a9,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 68063e0f8bcd439e8365c3eeee26d99c-20221124 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1505582079; Thu, 24 Nov 2022 20:39:03 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 24 Nov 2022 20:39:01 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 24 Nov 2022 20:39:01 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Matthias Brugger , Hans Verkuil CC: Chun-Kuang Hu , , , , , Moudy Ho Subject: [PATCH v4 3/9] media: platform: mtk-mdp3: chip config split about subcomponents Date: Thu, 24 Nov 2022 20:38:53 +0800 Message-ID: <20221124123859.24395-4-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20221124123859.24395-1-moudy.ho@mediatek.com> References: <20221124123859.24395-1-moudy.ho@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750381221784281697?= X-GMAIL-MSGID: =?utf-8?q?1750381221784281697?= Integrate and move subcomponent related information into the chip config header file for compatibility with multiple chips Signed-off-by: Moudy Ho --- .../mediatek/mdp3/mt8183/mdp3-plat-mt8183.h | 11 +++++++++++ .../media/platform/mediatek/mdp3/mtk-mdp3-comp.c | 14 ++------------ .../media/platform/mediatek/mdp3/mtk-mdp3-core.c | 1 + .../media/platform/mediatek/mdp3/mtk-mdp3-core.h | 1 + 4 files changed, 15 insertions(+), 12 deletions(-) diff --git a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h index 81fb80ec8ac2..a4bfde4a9e16 100644 --- a/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h +++ b/drivers/media/platform/mediatek/mdp3/mt8183/mdp3-plat-mt8183.h @@ -32,6 +32,17 @@ static const u32 mt8183_mutex_idx[MDP_MAX_COMP_COUNT] = { [MDP_COMP_CCORR0] = MUTEX_MOD_IDX_MDP_CCORR0, }; +static const struct of_device_id mt8183_sub_comp_dt_ids[] = { + { + .compatible = "mediatek,mt8183-mdp3-wdma", + .data = (void *)MDP_COMP_TYPE_PATH, + }, { + .compatible = "mediatek,mt8183-mdp3-wrot", + .data = (void *)MDP_COMP_TYPE_PATH, + }, + {} +}; + enum mt8183_mdp_comp_id { /* MT8183 Comp id */ /* ISP */ diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c index 1ac9c46e27d4..8f4786cc4416 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-comp.c @@ -639,17 +639,6 @@ static const struct of_device_id mdp_comp_dt_ids[] = { {} }; -static const struct of_device_id mdp_sub_comp_dt_ids[] = { - { - .compatible = "mediatek,mt8183-mdp3-wdma", - .data = (void *)MDP_COMP_TYPE_PATH, - }, { - .compatible = "mediatek,mt8183-mdp3-wrot", - .data = (void *)MDP_COMP_TYPE_PATH, - }, - {} -}; - static inline bool is_dma_capable(const enum mdp_comp_type type) { return (type == MDP_COMP_TYPE_RDMA || @@ -900,6 +889,7 @@ static int mdp_comp_sub_create(struct mdp_dev *mdp) { struct device *dev = &mdp->pdev->dev; struct device_node *node, *parent; + const struct mtk_mdp_driver_data *data = mdp->mdp_data; parent = dev->of_node->parent; @@ -909,7 +899,7 @@ static int mdp_comp_sub_create(struct mdp_dev *mdp) int id, alias_id; struct mdp_comp *comp; - of_id = of_match_node(mdp_sub_comp_dt_ids, node); + of_id = of_match_node(data->mdp_sub_comp_dt_ids, node); if (!of_id) continue; if (!of_device_is_available(node)) { diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c index ee7b5a1bbc88..277253c8c963 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.c @@ -19,6 +19,7 @@ static const struct mtk_mdp_driver_data mt8183_mdp_driver_data = { .mdp_probe_infra = mt8183_mdp_probe_infra, + .mdp_sub_comp_dt_ids = mt8183_sub_comp_dt_ids, .mdp_cfg = &mt8183_plat_cfg, .mdp_mutex_table_idx = mt8183_mutex_idx, .comp_data = mt8183_mdp_comp_data, diff --git a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h index 0c398ef75616..b83b2c517730 100644 --- a/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h +++ b/drivers/media/platform/mediatek/mdp3/mtk-mdp3-core.h @@ -52,6 +52,7 @@ enum mdp_pipe_id { struct mtk_mdp_driver_data { const struct of_device_id *mdp_probe_infra; + const struct of_device_id *mdp_sub_comp_dt_ids; const struct mdp_platform_config *mdp_cfg; const u32 *mdp_mutex_table_idx; const struct mdp_comp_data *comp_data;