Message ID | 20221123100850.22969-5-rtanwar@maxlinear.com |
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State | New |
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Peter Anvin" <hpa@zytor.com>, <linux-lgm-soc@maxlinear.com>, <andriy.shevchenko@linux.intel.com> Subject: [PATCH v4 4/4] x86/of: Add support for boot time interrupt delivery mode configuration Date: Wed, 23 Nov 2022 18:08:50 +0800 Message-ID: <20221123100850.22969-5-rtanwar@maxlinear.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221123100850.22969-1-rtanwar@maxlinear.com> References: <20221123100850.22969-1-rtanwar@maxlinear.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: maxlinear.com Content-Type: text/plain; charset=WINDOWS-1252 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750282621383475499?= X-GMAIL-MSGID: =?utf-8?q?1750282621383475499?= |
Series |
x86/of: Add support for interrupt mode config for x86 OF systems
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Commit Message
Rahul Tanwar
Nov. 23, 2022, 10:08 a.m. UTC
Presently, init/boot time interrupt delivery mode is enumerated
only for ACPI enabled systems by parsing MADT table or for older
systems by parsing MP table. But for OF based x86 systems, it is
assumed & hardcoded to legacy PIC mode. This causes boot time crash
for platforms which do not use 8259 compliant legacy PIC.
Add support for configuration of init time interrupt delivery mode
for x86 OF based systems by introducing a new optional boolean
property 'intel,virtual-wire-mode' for interrupt-controller node
of local APIC. This property emulates IMCRP Bit 7 of MP feature
info byte 2 of MP floating pointer structure.
Defaults to legacy PIC mode if absent. Configures it to virtual
wire compatibility mode if present.
Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com>
---
arch/x86/kernel/devicetree.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
Comments
On Wed, Nov 23, 2022 at 06:08:50PM +0800, Rahul Tanwar wrote: > Presently, init/boot time interrupt delivery mode is enumerated > only for ACPI enabled systems by parsing MADT table or for older > systems by parsing MP table. But for OF based x86 systems, it is > assumed & hardcoded to legacy PIC mode. This causes boot time crash > for platforms which do not use 8259 compliant legacy PIC. > > Add support for configuration of init time interrupt delivery mode > for x86 OF based systems by introducing a new optional boolean > property 'intel,virtual-wire-mode' for interrupt-controller node > of local APIC. This property emulates IMCRP Bit 7 of MP feature > info byte 2 of MP floating pointer structure. > > Defaults to legacy PIC mode if absent. Configures it to virtual > wire compatibility mode if present. From code perspective looks good to me, but you need to have a blessing by DT people for first two patches. With whatever property name agreed on, Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > Signed-off-by: Rahul Tanwar <rtanwar@maxlinear.com> > --- > arch/x86/kernel/devicetree.c | 9 ++++++++- > 1 file changed, 8 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c > index fcc6f1b7818f..458e43490414 100644 > --- a/arch/x86/kernel/devicetree.c > +++ b/arch/x86/kernel/devicetree.c > @@ -167,7 +167,14 @@ static void __init dtb_lapic_setup(void) > return; > } > smp_found_config = 1; > - pic_mode = 1; > + if (of_property_read_bool(dn, "intel,virtual-wire-mode")) { > + pr_info("Virtual Wire compatibility mode.\n"); > + pic_mode = 0; > + } else { > + pr_info("IMCR and PIC compatibility mode.\n"); > + pic_mode = 1; > + } > + > register_lapic_address(lapic_addr); > } > > -- > 2.17.1 >
diff --git a/arch/x86/kernel/devicetree.c b/arch/x86/kernel/devicetree.c index fcc6f1b7818f..458e43490414 100644 --- a/arch/x86/kernel/devicetree.c +++ b/arch/x86/kernel/devicetree.c @@ -167,7 +167,14 @@ static void __init dtb_lapic_setup(void) return; } smp_found_config = 1; - pic_mode = 1; + if (of_property_read_bool(dn, "intel,virtual-wire-mode")) { + pr_info("Virtual Wire compatibility mode.\n"); + pic_mode = 0; + } else { + pr_info("IMCR and PIC compatibility mode.\n"); + pic_mode = 1; + } + register_lapic_address(lapic_addr); }