From patchwork Tue Nov 22 10:16:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Ranostay X-Patchwork-Id: 24242 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp2116624wrr; Tue, 22 Nov 2022 02:18:38 -0800 (PST) X-Google-Smtp-Source: AA0mqf7+fif3rYNntlyJCvMsX4xT50pqB2fy61MDNuVnuvEqDlqg5UHi/9xh/AIhgaeRaQFBUZVe X-Received: by 2002:aa7:91c9:0:b0:56d:8e07:4626 with SMTP id z9-20020aa791c9000000b0056d8e074626mr24697284pfa.70.1669112318313; Tue, 22 Nov 2022 02:18:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1669112318; cv=none; d=google.com; s=arc-20160816; b=giI5UPnRgenf3xRWvYzwMxvj0lnX30rk7G6tNL+dGL2cuahmaNliWQ78ILZuu6YAAE yAgr4AmapW35UtQnNyaGZLbo48Eg5wezeyd03Wc4slcMsZfnUXOEf0aSeycBefS3zJ0f yZK/h1SuF+FnDnFqWy4jEifOC7WY31csvj8h160Lt8m5wVXguv2m6d/MLQpict5a+HQi Mw8WqZntGEsl1zDQYCT57p03ffKLYp0TX9lHTiLvF1eZKWxGshipI+apFeJr9waEpkfg ikmsj4opuYfSXY5liZeUK99bC2xNP3UTQdeWHAAiZeBzdRrtLPGmAwHuAvlUW6j1x0xJ aJzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Q+QMvPeLlcBvjDSfmGIGLrMc1QSDQX9bUOXq6vu3/pQ=; b=B2qgwoBRsJcXV1TFkppZrB11ATDVpcX66C+f51Z0WeQLT3WJpMl2AIug0f0ur6pta6 1yLUm3TltbQf4AY/oRPMssdakrPoU3U30DV1+t6pGGnMpawK34fEMinD84mQZ0WcZEFg BX9CkzdSaUYeau6zQQRm0EuBvJpWCFqD5AGerVu32Brmdyk36HKQ7OfGU9iBxdDsI0Xn xaY/ZS1H01TDhHtiHWDVvmTYpy9iaV3G13UddqKnT5bMLC7BpjQbv/oBZoPcJ4aVLaUB xSaqLqBXeZWrr7aV+sLjQF+5LuNV/1+tDeKTeRY1WsQ1pDOzR7gPcUFr2Z50BUN/esnk Tibg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="fag/lo4z"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id p18-20020a170902e75200b00188fe19d3dbsi13297293plf.163.2022.11.22.02.18.20; Tue, 22 Nov 2022 02:18:38 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="fag/lo4z"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233042AbiKVKRs (ORCPT + 99 others); Tue, 22 Nov 2022 05:17:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43764 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233512AbiKVKRG (ORCPT ); Tue, 22 Nov 2022 05:17:06 -0500 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CEE77554D1; Tue, 22 Nov 2022 02:16:59 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2AMAGsws116962; Tue, 22 Nov 2022 04:16:54 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1669112214; bh=Q+QMvPeLlcBvjDSfmGIGLrMc1QSDQX9bUOXq6vu3/pQ=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fag/lo4z8KrE1vj5lCnVDi+3W/CLq/ca+NsBs993M2qS1fVOZVZ71O4Z3V4ZV0c4l DViocQexAb4Z77vTepoJ2z8Mb3mDrvuX7R1s58VMJXdpsq3gzN+HBaxEcw5FKD3/uO uitr3nbEn2X/VBQ0FYnNYfxbf6rru3wa8YuNbJAA= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2AMAGsmC019885 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 22 Nov 2022 04:16:54 -0600 Received: from DFLE106.ent.ti.com (10.64.6.27) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Tue, 22 Nov 2022 04:16:54 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Tue, 22 Nov 2022 04:16:54 -0600 Received: from localhost (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2AMAGp5Q088978; Tue, 22 Nov 2022 04:16:53 -0600 From: Matt Ranostay To: , , , , , , , CC: , , Subject: [PATCH v7 7/8] arm64: dts: ti: k3-j721s2-main: Add PCIe device tree node Date: Tue, 22 Nov 2022 02:16:15 -0800 Message-ID: <20221122101616.770050-8-mranostay@ti.com> X-Mailer: git-send-email 2.38.GIT In-Reply-To: <20221122101616.770050-1-mranostay@ti.com> References: <20221122101616.770050-1-mranostay@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1750191118144092416?= X-GMAIL-MSGID: =?utf-8?q?1750191118144092416?= From: Aswath Govindraju Add PCIe1 RC device tree node for the single PCIe instance present on the j721s2. Reviewed-by: Siddharth Vadapalli Signed-off-by: Aswath Govindraju Signed-off-by: Vignesh Raghavendra Signed-off-by: Matt Ranostay --- arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi index 2858ba589d54..27631ef32bf5 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi @@ -841,6 +841,47 @@ serdes0: serdes@5060000 { }; }; + pcie1_rc: pcie@2910000 { + compatible = "ti,j7200-pcie-host", "ti,j721e-pcie-host"; + reg = <0x00 0x02910000 0x00 0x1000>, + <0x00 0x02917000 0x00 0x400>, + <0x00 0x0d800000 0x00 0x00800000>, + <0x00 0x18000000 0x00 0x00001000>; + reg-names = "intd_cfg", "user_cfg", "reg", "cfg"; + interrupt-names = "link_state"; + interrupts = ; + device_type = "pci"; + ti,syscon-pcie-ctrl = <&scm_conf 0x074>; + max-link-speed = <3>; + num-lanes = <4>; + power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 276 41>; + clock-names = "fck"; + #address-cells = <3>; + #size-cells = <2>; + bus-range = <0x0 0xff>; + vendor-id = <0x104c>; + device-id = <0xb013>; + msi-map = <0x0 &gic_its 0x0 0x10000>; + dma-coherent; + ranges = <0x01000000 0x0 0x18001000 0x00 0x18001000 0x0 0x0010000>, + <0x02000000 0x0 0x18011000 0x00 0x18011000 0x0 0x7fef000>; + dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x10000 0x0>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie1_intc 0>, /* INT A */ + <0 0 0 2 &pcie1_intc 0>, /* INT B */ + <0 0 0 3 &pcie1_intc 0>, /* INT C */ + <0 0 0 4 &pcie1_intc 0>; /* INT D */ + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&gic500>; + interrupts = ; + }; + }; + main_mcan0: can@2701000 { compatible = "bosch,m_can"; reg = <0x00 0x02701000 0x00 0x200>,