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[93.5.22.158]) by smtp.googlemail.com with ESMTPSA id j10-20020adff00a000000b002d1bfe3269esm27102109wro.59.2023.03.28.02.05.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Mar 2023 02:05:02 -0700 (PDT) From: Alexandre Mergnat Date: Tue, 28 Mar 2023 11:04:48 +0200 Subject: [PATCH v6 2/2] arm64: dts: mediatek: enable i2c0 for mt8365-evk board MIME-Version: 1.0 Message-Id: <20221122-mt8365-i2c-support-v6-2-e1009c8afd53@baylibre.com> References: <20221122-mt8365-i2c-support-v6-0-e1009c8afd53@baylibre.com> In-Reply-To: <20221122-mt8365-i2c-support-v6-0-e1009c8afd53@baylibre.com> To: Qii Wang , Rob Herring , Krzysztof Kozlowski , Matthias Brugger Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, Fabien Parent , Rob Herring , AngeloGioacchino Del Regno , Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1213; i=amergnat@baylibre.com; h=from:subject:message-id; bh=oenjaAD8yENugJ98bbechsKeee+bhy6mS/fPCtOzVTk=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBkIq27SlFTL8MC9k4ujZdwxuq3vNeLbQumhcib27er OgQI70uJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZCKtuwAKCRArRkmdfjHURWz/D/ sFXI8s9TB/qi3jpFd/eIFHieqQczvcNbppzmtw2IaKeSYj4L5NQ2IHJq1BVTDqt4C+63+P6LudKs/o hurxwr/Gi7n7GxUIokB3Pqaiza0PmwZh/+ty8GmE25C2VrWXSXie6bwya9ciOcvzvRHjneZWzzwpNf 4GO+ZoXHAhS7HRzUxtrKUxuk1skldQszNlc+hPzcL9hzl+N+YNqxrFBbZaAjgqJ2RS/E49fp6r8vI8 0SaLRQHzOZOEDEioGdE/3MvytFVGEBiHuONio7h/O1+ae00ZHjcbfJ7Ns5kCQlUcjfWiTt4D5EIfe7 UhC6hGUtBOxjQzR5geXTtM8IjY4acENy2/MSpHEIWMLcGWF/IO2tmXzno/wdLPD2q4LPzSXYlCkrk+ ja8194zterVHQY9ecTD/KsDzfsgkAsnVB6cbCv2OxrihuzePBRZPoQhs3B/0a+nk9AqqTYt+DZviI4 trmjzAo3ykqHOxtdPdKRUpEsm/3ku8irhv9HQTCEgms7VHL4usqWTwE0MINlJePPNYTpgiIe4kOYDN UDIw3AWNImmYClwUcnX40Xas+gWTXU8UH5C47HH8aXmryu2Z3KEXqmItRiU9mu1askHaiJNLST3QyA etFbBfVE6NMlGxRUAbrHKkA1W1VLBKhkjh1h97cR9BcdwPBLg//URJnWqDBw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=0.0 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1761602468248921743?= X-GMAIL-MSGID: =?utf-8?q?1761602468248921743?= Enable the I2C0 bus provides communication with: - The integrated RT9466 Switching Battery Charger. - The integrated MT6691 LP4X buck for VDDQ. - The integrated MT6691 LP4X buck for VDD2. - The pin header, to plug external I2C devices. Signed-off-by: Alexandre Mergnat Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 4683704ea235..adc79ba14b33 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -87,6 +87,13 @@ optee_reserved: optee@43200000 { }; }; +&i2c0 { + clock-frequency = <100000>; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + &pio { gpio_keys: gpio-keys-pins { pins { @@ -96,6 +103,14 @@ pins { }; }; + i2c0_pins: i2c0-pins { + pins { + bias-pull-up; + pinmux = , + ; + }; + }; + uart0_pins: uart0-pins { pins { pinmux = ,