diff mbox series

[V2,32/33] iommu/amd: Enable PCI/IMS

Message ID	20221121091328.236473819@linutronix.de
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Message-ID: <20221121091328.236473819@linutronix.de> From: Thomas Gleixner <tglx@linutronix.de> To: LKML <linux-kernel@vger.kernel.org> Cc: x86@kernel.org, Joerg Roedel <joro@8bytes.org>, Will Deacon <will@kernel.org>, linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Marc Zyngier <maz@kernel.org>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Jason Gunthorpe <jgg@mellanox.com>, Dave Jiang <dave.jiang@intel.com>, Alex Williamson <alex.williamson@redhat.com>, Kevin Tian <kevin.tian@intel.com>, Dan Williams <dan.j.williams@intel.com>, Logan Gunthorpe <logang@deltatee.com>, Ashok Raj <ashok.raj@intel.com>, Jon Mason <jdmason@kudzu.us>, Allen Hubbe <allenbh@gmail.com> Subject: [patch V2 32/33] iommu/amd: Enable PCI/IMS References: <20221121083657.157152924@linutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Date: Mon, 21 Nov 2022 15:38:26 +0100 (CET) Precedence: bulk
Series	genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 3 implementation \| [V2,00/33] genirq, PCI/MSI: Support for per device MSI and PCI/IMS - Part 3 implementation [V2,01/33] genirq/msi: Rearrange MSI domain flags [V2,02/33] genirq/msi: Provide struct msi_parent_ops [V2,03/33] genirq/msi: Provide data structs for per device domains [V2,04/33] genirq/msi: Add size info to struct msi_domain_info [V2,05/33] genirq/msi: Split msi_create_irq_domain() [V2,06/33] genirq/irqdomain: Add irq_domain::dev for per device MSI domains [V2,07/33] genirq/msi: Provide msi_create/free_device_irq_domain() [V2,08/33] genirq/msi: Provide msi_match_device_domain() [V2,09/33] genirq/msi: Add range checking to msi_insert_desc() [V2,10/33] PCI/MSI: Split __pci_write_msi_msg() [V2,11/33] genirq/msi: Provide BUS_DEVICE_PCI_MSI[X] [V2,12/33] PCI/MSI: Add support for per device MSI[X] domains [V2,13/33] x86/apic/vector: Provide MSI parent domain [V2,14/33] PCI/MSI: Remove unused pci_dev_has_special_msi_domain() [V2,15/33] iommu/vt-d: Switch to MSI parent domains [V2,16/33] iommu/amd: Switch to MSI base domains [V2,17/33] x86/apic/msi: Remove arch_create_remap_msi_irq_domain() [V2,18/33] genirq/msi: Provide struct msi_map [V2,19/33] genirq/msi: Provide msi_desc::msi_data [V2,20/33] genirq/msi: Provide msi_domain_ops::prepare_desc() [V2,21/33] genirq/msi: Provide msi_domain_alloc_irq_at() [V2,22/33] genirq/msi: Provide MSI_FLAG_MSIX_ALLOC_DYN [V2,23/33] PCI/MSI: Split MSI-X descriptor setup [V2,24/33] PCI/MSI: Provide prepare_desc() MSI domain op [V2,25/33] PCI/MSI: Provide post-enable dynamic allocation interfaces for MSI-X [V2,26/33] x86/apic/msi: Enable MSI_FLAG_PCI_MSIX_ALLOC_DYN [V2,27/33] genirq/msi: Provide constants for PCI/IMS support [V2,28/33] PCI/MSI: Provide IMS (Interrupt Message Store) support [V2,29/33] PCI/MSI: Provide pci_ims_alloc/free_irq() [V2,30/33] x86/apic/msi: Enable PCI/IMS [V2,31/33] iommu/vt-d: Enable PCI/IMS [V2,32/33] iommu/amd: Enable PCI/IMS [V2,33/33] irqchip: Add IDXD Interrupt Message Store driver

Commit Message

Thomas Gleixner Nov. 21, 2022, 2:38 p.m. UTC

  PCI/IMS works like PCI/MSI-X in the remapping. Just add the feature flag.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
---
 drivers/iommu/amd/iommu.c |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff mbox series

Patch

--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -3649,7 +3649,9 @@  static struct irq_chip amd_ir_chip = {
 };
 
 static const struct msi_parent_ops amdvi_msi_parent_ops = {
-	.supported_flags	= X86_VECTOR_MSI_FLAGS_SUPPORTED | MSI_FLAG_MULTI_PCI_MSI,
+	.supported_flags	= X86_VECTOR_MSI_FLAGS_SUPPORTED |
+				  MSI_FLAG_MULTI_PCI_MSI |
+				  MSI_FLAG_PCI_IMS,
 	.prefix			= "IR-",
 	.init_dev_msi_info	= msi_parent_init_dev_msi_info,
 };