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[2620:137:e000::1:20]) by mx.google.com with ESMTP id z12-20020a05640240cc00b0046154f0f866si5189827edb.159.2022.11.18.20.11.32; Fri, 18 Nov 2022 20:11:57 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RTOHdmrq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232177AbiKSEJy (ORCPT + 99 others); Fri, 18 Nov 2022 23:09:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230398AbiKSEJl (ORCPT ); Fri, 18 Nov 2022 23:09:41 -0500 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 148D174623; Fri, 18 Nov 2022 20:09:40 -0800 (PST) Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 2AJ49TRP062254; Fri, 18 Nov 2022 22:09:29 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1668830969; bh=O161wI64MkqL1bXQrEKXqqHqqSz8Rg1odY1/d9cyRhc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=RTOHdmrqSfqjni5YL1rBnW9ND7AEKy/hmZDujbzKx5TaQavLWL80hF3L4IQN6LdDC /ImmlkFr0Y+rj/ZhmULEP/Jc+1zPlcbI8sAEiOypzc+gYzM5AVsGAJWW2AmA1sH3qd lOwuLjOwUMpTuezrZAqt14aFTUJiqo1HYkx2Bq2I= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 2AJ49TCO001069 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 18 Nov 2022 22:09:29 -0600 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 18 Nov 2022 22:09:28 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 18 Nov 2022 22:09:28 -0600 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 2AJ49Q9j085523; Fri, 18 Nov 2022 22:09:27 -0600 From: Matt Ranostay To: , , , , , , CC: , , Subject: [PATCH v6 4/8] arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0 Date: Fri, 18 Nov 2022 20:09:02 -0800 Message-ID: <20221119040906.9495-5-mranostay@ti.com> X-Mailer: git-send-email 2.38.GIT In-Reply-To: <20221119040906.9495-1-mranostay@ti.com> References: <20221119040906.9495-1-mranostay@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749896257339283991?= X-GMAIL-MSGID: =?utf-8?q?1749896257339283991?= From: Aswath Govindraju Configure first lane to PCIe, the second lane to USB and the last two lanes to eDP. Also, add sub-nodes to SERDES0 DT node to represent SERDES0 is connected to PCIe. Reviewed-by: Ravi Gunasekaran Signed-off-by: Aswath Govindraju Signed-off-by: Matt Ranostay --- .../dts/ti/k3-j721s2-common-proc-board.dts | 22 +++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index a7aa6cf08acd..c3a397484c70 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -9,6 +9,9 @@ #include "k3-j721s2-som-p0.dtsi" #include +#include +#include +#include / { compatible = "ti,j721s2-evm", "ti,j721s2"; @@ -296,6 +299,25 @@ &cpsw_port1 { phy-handle = <&phy0>; }; +&serdes_ln_ctrl { + idle-states = , , + , ; +}; + +&serdes_refclk { + clock-frequency = <100000000>; +}; + +&serdes0 { + serdes0_pcie_link: phy@0 { + reg = <0>; + cdns,num-lanes = <1>; + #phy-cells = <0>; + cdns,phy-type = ; + resets = <&serdes_wiz0 1>; + }; +}; + &mcu_mcan0 { status = "okay"; pinctrl-names = "default";