diff mbox series

[v1,2/4] dt-bindings: power: Add starfive,jh71xx-power bindings

Message ID 20221118133216.17037-3-walker.chen@starfivetech.com
State New
Headers
Series JH7110 Power Domain Support |

Commit Message

Walker Chen Nov. 18, 2022, 1:32 p.m. UTC 
  Add bindings for the power domain controller on the StarFive JH71XX SoC.

Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
---
 .../bindings/power/starfive,jh71xx-power.yaml | 46 +++++++++++++++++++
 1 file changed, 46 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml

Comments

Krzysztof Kozlowski Nov. 21, 2022, 10:13 a.m. UTC | #1 
On 18/11/2022 14:32, Walker Chen wrote:
> Add bindings for the power domain controller on the StarFive JH71XX SoC.
> 

Subject: drop second, redundant "bindings".

> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
> ---
>  .../bindings/power/starfive,jh71xx-power.yaml | 46 +++++++++++++++++++

1st patch should be squashed here. Headers are part of bindings file.

>  1 file changed, 46 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
> 
> diff --git a/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
> new file mode 100644
> index 000000000000..2537303b4829
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml

Filename like compatible.

> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/power/starfive,jh71xx-power.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: StarFive JH71xx Power Domains Controller
> +
> +maintainers:
> +  - Walker Chen <walker.chen@starfivetech.com>
> +
> +description: |
> +  StarFive JH71xx SoCs include support for multiple power domains which can be
> +  powered on/off by software based on different application scenes to save power.
> +
> +properties:
> +  compatible:
> +    items:

No items. You have just one item,

> +      - enum:
> +          - starfive,jh7110-pmu
> +

Best regards,
Krzysztof
Walker Chen Nov. 22, 2022, 1:22 p.m. UTC | #2 
On 2022/11/21 18:13, Krzysztof Kozlowski wrote:
> On 18/11/2022 14:32, Walker Chen wrote:
>> Add bindings for the power domain controller on the StarFive JH71XX SoC.
>> 
> 
> Subject: drop second, redundant "bindings".

Will fix.

> 
>> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
>> ---
>>  .../bindings/power/starfive,jh71xx-power.yaml | 46 +++++++++++++++++++
> 
> 1st patch should be squashed here. Headers are part of bindings file.

Will be done in the next version of patch.

> 
>>  1 file changed, 46 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
>> 
>> diff --git a/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
>> new file mode 100644
>> index 000000000000..2537303b4829
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
> 
> Filename like compatible.

As mentioned in the previous email, the compatible in the driver should be changed to "starfive,jh7110-power".

> 
>> @@ -0,0 +1,46 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/power/starfive,jh71xx-power.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive JH71xx Power Domains Controller
>> +
>> +maintainers:
>> +  - Walker Chen <walker.chen@starfivetech.com>
>> +
>> +description: |
>> +  StarFive JH71xx SoCs include support for multiple power domains which can be
>> +  powered on/off by software based on different application scenes to save power.
>> +
>> +properties:
>> +  compatible:
>> +    items:
> 
> No items. You have just one item,

Yes, this issue will be fixed. Thank you for your advice.

Best Regards,
Walker Chen
Rob Herring Nov. 30, 2022, 3:24 p.m. UTC | #3 
On Tue, Nov 22, 2022 at 09:22:03PM +0800, Walker Chen wrote:
> On 2022/11/21 18:13, Krzysztof Kozlowski wrote:
> > On 18/11/2022 14:32, Walker Chen wrote:
> >> Add bindings for the power domain controller on the StarFive JH71XX SoC.
> >> 
> > 
> > Subject: drop second, redundant "bindings".
> 
> Will fix.
> 
> > 
> >> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
> >> ---
> >>  .../bindings/power/starfive,jh71xx-power.yaml | 46 +++++++++++++++++++
> > 
> > 1st patch should be squashed here. Headers are part of bindings file.
> 
> Will be done in the next version of patch.
> 
> > 
> >>  1 file changed, 46 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
> >> 
> >> diff --git a/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
> >> new file mode 100644
> >> index 000000000000..2537303b4829
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
> > 
> > Filename like compatible.
> 
> As mentioned in the previous email, the compatible in the driver should be changed to "starfive,jh7110-power".

Is the h/w block called 'power' or 'pmu'? Call it what the h/w is 
called.

Rob
Walker Chen Dec. 1, 2022, 5:51 a.m. UTC | #4 
On 2022/11/30 23:24, Rob Herring wrote:
> On Tue, Nov 22, 2022 at 09:22:03PM +0800, Walker Chen wrote:
>> On 2022/11/21 18:13, Krzysztof Kozlowski wrote:
>> > On 18/11/2022 14:32, Walker Chen wrote:
>> >> Add bindings for the power domain controller on the StarFive JH71XX SoC.
>> >> 
>> > 
>> > Subject: drop second, redundant "bindings".
>> 
>> Will fix.
>> 
>> > 
>> >> Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
>> >> ---
>> >>  .../bindings/power/starfive,jh71xx-power.yaml | 46 +++++++++++++++++++
>> > 
>> > 1st patch should be squashed here. Headers are part of bindings file.
>> 
>> Will be done in the next version of patch.
>> 
>> > 
>> >>  1 file changed, 46 insertions(+)
>> >>  create mode 100644 Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
>> >> 
>> >> diff --git a/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
>> >> new file mode 100644
>> >> index 000000000000..2537303b4829
>> >> --- /dev/null
>> >> +++ b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
>> > 
>> > Filename like compatible.
>> 
>> As mentioned in the previous email, the compatible in the driver should be changed to "starfive,jh7110-power".
> 
> Is the h/w block called 'power' or 'pmu'? Call it what the h/w is 
> called.

h/w block is called PMU, is the abbreviation of Power Management Unit.
It is more appropriate to change the compatile to 'starfive,jh7110-pmu'.

Best Regards,
Walker Chen
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
new file mode 100644
index 000000000000..2537303b4829
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/starfive,jh71xx-power.yaml
@@ -0,0 +1,46 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/power/starfive,jh71xx-power.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: StarFive JH71xx Power Domains Controller
+
+maintainers:
+  - Walker Chen <walker.chen@starfivetech.com>
+
+description: |
+  StarFive JH71xx SoCs include support for multiple power domains which can be
+  powered on/off by software based on different application scenes to save power.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - starfive,jh7110-pmu
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  "#power-domain-cells":
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - "#power-domain-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    pwrc: power-controller@17030000 {
+        compatible = "starfive,jh7110-pmu";
+        reg = <0x17030000 0x10000>;
+        interrupts = <111>;
+        #power-domain-cells = <1>;
+    };