@@ -103,6 +103,8 @@ enum rkisp1_isp_pad {
* enum rkisp1_feature - ISP features
*
* @RKISP1_FEATURE_MIPI_CSI2: The ISP has an internal MIPI CSI-2 receiver
+ * @RKISP1_FEATURE_DUAL_CROP: The ISP has the dual crop block at the resizer input
+ * @RKISP1_FEATURE_RSZ_CROP: The ISP supports cropping in the resizer
*
* The ISP features are stored in a bitmask in &rkisp1_info.features and allow
* the driver to implement support for features present in some ISP versions
@@ -110,6 +112,8 @@ enum rkisp1_isp_pad {
*/
enum rkisp1_feature {
RKISP1_FEATURE_MIPI_CSI2 = BIT(0),
+ RKISP1_FEATURE_DUAL_CROP = BIT(1),
+ RKISP1_FEATURE_RSZ_CROP = BIT(2),
};
#define rkisp1_has_feature(rkisp1, feature) \
@@ -115,9 +115,21 @@ static int rkisp1_debug_dump_rsz_regs_show(struct seq_file *m, void *p)
RKISP1_DEBUG_SHD_REG(RSZ_PHASE_VC),
{ /* Sentinel */ },
};
+ static const struct rkisp1_debug_register crop_registers[] = {
+ RKISP1_DEBUG_SHD_REG(RSZ_CROP_X_DIR),
+ RKISP1_DEBUG_SHD_REG(RSZ_CROP_Y_DIR),
+ RKISP1_DEBUG_REG(RSZ_FRAME_RATE),
+ RKISP1_DEBUG_REG(RSZ_FORMAT_CONV_CTRL),
+ { /* Sentinel */ },
+ };
struct rkisp1_resizer *rsz = m->private;
- return rkisp1_debug_dump_regs(rsz->rkisp1, m, rsz->regs_base, registers);
+ rkisp1_debug_dump_regs(rsz->rkisp1, m, rsz->regs_base, registers);
+ if (rkisp1_has_feature(rsz->rkisp1, RSZ_CROP))
+ rkisp1_debug_dump_regs(rsz->rkisp1, m, rsz->regs_base,
+ crop_registers);
+
+ return 0;
}
DEFINE_SHOW_ATTRIBUTE(rkisp1_debug_dump_rsz_regs);
@@ -475,7 +475,8 @@ static const struct rkisp1_info px30_isp_info = {
.isrs = px30_isp_isrs,
.isr_size = ARRAY_SIZE(px30_isp_isrs),
.isp_ver = RKISP1_V12,
- .features = RKISP1_FEATURE_MIPI_CSI2,
+ .features = RKISP1_FEATURE_MIPI_CSI2
+ | RKISP1_FEATURE_DUAL_CROP,
};
static const char * const rk3399_isp_clks[] = {
@@ -494,7 +495,8 @@ static const struct rkisp1_info rk3399_isp_info = {
.isrs = rk3399_isp_isrs,
.isr_size = ARRAY_SIZE(rk3399_isp_isrs),
.isp_ver = RKISP1_V10,
- .features = RKISP1_FEATURE_MIPI_CSI2,
+ .features = RKISP1_FEATURE_MIPI_CSI2
+ | RKISP1_FEATURE_DUAL_CROP,
};
static const char * const imx8mp_isp_clks[] = {
@@ -513,6 +515,7 @@ static const struct rkisp1_info imx8mp_isp_info = {
.isrs = imx8mp_isp_isrs,
.isr_size = ARRAY_SIZE(imx8mp_isp_isrs),
.isp_ver = IMX8MP_V10,
+ .features = RKISP1_FEATURE_RSZ_CROP,
};
static const struct of_device_id rkisp1_of_match[] = {
@@ -168,6 +168,9 @@
#define RKISP1_CIF_RSZ_CTRL_CFG_UPD_AUTO BIT(9)
#define RKISP1_CIF_RSZ_SCALER_FACTOR BIT(16)
+/* RSZ_CROP_[XY]_DIR */
+#define RKISP1_CIF_RSZ_CROP_XY_DIR(start, end) ((end) << 16 | (start) << 0)
+
/* MI_IMSC - MI_MIS - MI_RIS - MI_ICR - MI_ISR */
#define RKISP1_CIF_MI_FRAME(stream) BIT((stream)->id)
#define RKISP1_CIF_MI_MBLK_LINE BIT(2)
@@ -925,6 +928,12 @@
#define RKISP1_CIF_RSZ_PHASE_HC_SHD 0x004C
#define RKISP1_CIF_RSZ_PHASE_VY_SHD 0x0050
#define RKISP1_CIF_RSZ_PHASE_VC_SHD 0x0054
+#define RKISP1_CIF_RSZ_CROP_X_DIR 0x0058
+#define RKISP1_CIF_RSZ_CROP_Y_DIR 0x005C
+#define RKISP1_CIF_RSZ_CROP_X_DIR_SHD 0x0060
+#define RKISP1_CIF_RSZ_CROP_Y_DIR_SHD 0x0064
+#define RKISP1_CIF_RSZ_FRAME_RATE 0x0068
+#define RKISP1_CIF_RSZ_FORMAT_CONV_CTRL 0x006C
#define RKISP1_CIF_MI_BASE 0x00001400
#define RKISP1_CIF_MI_CTRL (RKISP1_CIF_MI_BASE + 0x00000000)
@@ -244,6 +244,7 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
{
u32 ratio, rsz_ctrl = 0;
unsigned int i;
+ u32 val;
/* No phase offset */
rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_PHASE_HY, 0);
@@ -292,6 +293,18 @@ static void rkisp1_rsz_config_regs(struct rkisp1_resizer *rsz,
rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CTRL, rsz_ctrl);
+ if (rkisp1_has_feature(rsz->rkisp1, RSZ_CROP)) {
+ val = RKISP1_CIF_RSZ_CROP_XY_DIR(src_y->left, src_y->left + src_y->width - 1);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CROP_X_DIR, val);
+ val = RKISP1_CIF_RSZ_CROP_XY_DIR(src_y->top, src_y->top + src_y->height - 1);
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_CROP_Y_DIR, val);
+
+ val = RKISP1_CIF_RSZ_FORMAT_CONV_CTRL_RSZ_INPUT_FORMAT_YCBCR_422
+ | RKISP1_CIF_RSZ_FORMAT_CONV_CTRL_RSZ_OUTPUT_FORMAT_YCBCR_420
+ | RKISP1_CIF_RSZ_FORMAT_CONV_CTRL_RSZ_PACK_FORMAT_SEMI_PLANAR;
+ rkisp1_rsz_write(rsz, RKISP1_CIF_RSZ_FORMAT_CONV_CTRL, val);
+ }
+
rkisp1_rsz_update_shadow(rsz, when);
}
@@ -695,7 +708,8 @@ static int rkisp1_rsz_s_stream(struct v4l2_subdev *sd, int enable)
enum rkisp1_shadow_regs_when when = RKISP1_SHADOW_REGS_SYNC;
if (!enable) {
- rkisp1_dcrop_disable(rsz, RKISP1_SHADOW_REGS_ASYNC);
+ if (rkisp1_has_feature(rkisp1, DUAL_CROP))
+ rkisp1_dcrop_disable(rsz, RKISP1_SHADOW_REGS_ASYNC);
rkisp1_rsz_disable(rsz, RKISP1_SHADOW_REGS_ASYNC);
return 0;
}
@@ -705,7 +719,8 @@ static int rkisp1_rsz_s_stream(struct v4l2_subdev *sd, int enable)
mutex_lock(&rsz->ops_lock);
rkisp1_rsz_config(rsz, when);
- rkisp1_dcrop_config(rsz);
+ if (rkisp1_has_feature(rkisp1, DUAL_CROP))
+ rkisp1_dcrop_config(rsz);
mutex_unlock(&rsz->ops_lock);
return 0;