Message ID | 20221118011714.70877-5-hal.feng@starfivetech.com |
---|---|
State | New |
Headers |
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[2620:137:e000::1:20]) by mx.google.com with ESMTP id p26-20020a056402155a00b004597b778b3bsi2106432edx.75.2022.11.17.17.35.10; Thu, 17 Nov 2022 17:35:33 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240742AbiKRBcQ convert rfc822-to-8bit (ORCPT <rfc822;a1648639935@gmail.com> + 99 others); Thu, 17 Nov 2022 20:32:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240981AbiKRBbX (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Thu, 17 Nov 2022 20:31:23 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3B6C720AB; Thu, 17 Nov 2022 17:31:22 -0800 (PST) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 42A5A24E1FF; Fri, 18 Nov 2022 09:17:21 +0800 (CST) Received: from EXMBX072.cuchost.com (172.16.6.82) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:21 +0800 Received: from ubuntu.localdomain (183.27.96.116) by EXMBX072.cuchost.com (172.16.6.82) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 18 Nov 2022 09:17:20 +0800 From: Hal Feng <hal.feng@starfivetech.com> To: <linux-riscv@lists.infradead.org>, <devicetree@vger.kernel.org> CC: Conor Dooley <conor@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, "Rob Herring" <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Ben Dooks <ben.dooks@sifive.com>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, "Linus Walleij" <linus.walleij@linaro.org>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, Hal Feng <hal.feng@starfivetech.com>, <linux-kernel@vger.kernel.org> Subject: [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Date: Fri, 18 Nov 2022 09:17:10 +0800 Message-ID: <20221118011714.70877-5-hal.feng@starfivetech.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221118011714.70877-1-hal.feng@starfivetech.com> References: <20221118011714.70877-1-hal.feng@starfivetech.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [183.27.96.116] X-ClientProxiedBy: EXCAS064.cuchost.com (172.16.6.24) To EXMBX072.cuchost.com (172.16.6.82) X-YovoleRuleAgent: yovoleflag Content-Transfer-Encoding: 8BIT X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749795821017703977?= X-GMAIL-MSGID: =?utf-8?q?1749795821017703977?= |
Series |
Basic device tree support for StarFive JH7110 RISC-V SoC
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Commit Message
Hal Feng
Nov. 18, 2022, 1:17 a.m. UTC
From: Emil Renner Berthing <kernel@esmil.dk> This cache controller is also used on the StarFive JH7110 SoC. Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> --- .../devicetree/bindings/riscv/sifive,ccache0.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-)
Comments
On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > From: Emil Renner Berthing <kernel@esmil.dk> > > This cache controller is also used on the StarFive JH7110 SoC. "... and configured identically to that of the FU740"? Anyways, Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > --- > .../devicetree/bindings/riscv/sifive,ccache0.yaml | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml > index bf3f07421f7e..262d1d49ce25 100644 > --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml > +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml > @@ -25,6 +25,7 @@ select: > - sifive,ccache0 > - sifive,fu540-c000-ccache > - sifive,fu740-c000-ccache > + - starfive,jh7110-ccache > > required: > - compatible > @@ -37,6 +38,7 @@ properties: > - sifive,ccache0 > - sifive,fu540-c000-ccache > - sifive,fu740-c000-ccache > + - starfive,jh7110-ccache > - const: cache > - items: > - const: microchip,mpfs-ccache > @@ -86,6 +88,7 @@ allOf: > enum: > - sifive,fu740-c000-ccache > - microchip,mpfs-ccache > + - starfive,jh7110-ccache > > then: > properties: > @@ -105,7 +108,9 @@ allOf: > properties: > compatible: > contains: > - const: sifive,fu740-c000-ccache > + enum: > + - sifive,fu740-c000-ccache > + - starfive,jh7110-ccache > > then: > properties: > -- > 2.38.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: > On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > This cache controller is also used on the StarFive JH7110 SoC. > > "... and configured identically to that of the FU740"? > Anyways, > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Actually, after looking at the next patch - why can you not fall back to the fu740 one since you appear to have the same configuration as it? > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > > --- > > .../devicetree/bindings/riscv/sifive,ccache0.yaml | 7 ++++++- > > 1 file changed, 6 insertions(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml > > index bf3f07421f7e..262d1d49ce25 100644 > > --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml > > +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml > > @@ -25,6 +25,7 @@ select: > > - sifive,ccache0 > > - sifive,fu540-c000-ccache > > - sifive,fu740-c000-ccache > > + - starfive,jh7110-ccache > > > > required: > > - compatible > > @@ -37,6 +38,7 @@ properties: > > - sifive,ccache0 > > - sifive,fu540-c000-ccache > > - sifive,fu740-c000-ccache > > + - starfive,jh7110-ccache > > - const: cache > > - items: > > - const: microchip,mpfs-ccache > > @@ -86,6 +88,7 @@ allOf: > > enum: > > - sifive,fu740-c000-ccache > > - microchip,mpfs-ccache > > + - starfive,jh7110-ccache > > > > then: > > properties: > > @@ -105,7 +108,9 @@ allOf: > > properties: > > compatible: > > contains: > > - const: sifive,fu740-c000-ccache > > + enum: > > + - sifive,fu740-c000-ccache > > + - starfive,jh7110-ccache > > > > then: > > properties: > > -- > > 2.38.1 > > > > > > _______________________________________________ > > linux-riscv mailing list > > linux-riscv@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: > On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: > > On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > This cache controller is also used on the StarFive JH7110 SoC. > > > > "... and configured identically to that of the FU740"? > > Anyways, > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > Actually, after looking at the next patch - why can you not fall back to > the fu740 one since you appear to have the same configuration as it? Right, I will drop this patch and use "sifive,fu740-c000-ccache" as compatible in dts. Best regards, Hal
On Tue, Nov 22, 2022 at 04:40:23PM +0800, Hal Feng wrote: > On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: > > On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: > > > On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > > > This cache controller is also used on the StarFive JH7110 SoC. > > > > > > "... and configured identically to that of the FU740"? > > > Anyways, > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > > > Actually, after looking at the next patch - why can you not fall back to > > the fu740 one since you appear to have the same configuration as it? > > Right, I will drop this patch and use "sifive,fu740-c000-ccache" as > compatible in dts. Uh, that's not quite what I was suggesting. Rather than using that one in isolation, you can do the following in your dt: "starfive,jh7110-ccache", "sifive,fu740-c000-ccache" And then in the driver we need to make no changes - unless down the line we find some sort of issue that requires special handling etc. There's no harm in having a "starfive,jh7110-ccache" IMO. Thanks, Conor.
On 22/11/2022 09:07, Conor Dooley wrote: > On Tue, Nov 22, 2022 at 04:40:23PM +0800, Hal Feng wrote: >> On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: >>> On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: >>>> On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: >>>>> From: Emil Renner Berthing <kernel@esmil.dk> >>>>> >>>>> This cache controller is also used on the StarFive JH7110 SoC. >>>> >>>> "... and configured identically to that of the FU740"? >>>> Anyways, >>>> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> >>> >>> Actually, after looking at the next patch - why can you not fall back to >>> the fu740 one since you appear to have the same configuration as it? >> >> Right, I will drop this patch and use "sifive,fu740-c000-ccache" as >> compatible in dts. > > Uh, that's not quite what I was suggesting. Rather than using that one > in isolation, you can do the following in your dt: > "starfive,jh7110-ccache", "sifive,fu740-c000-ccache" > > And then in the driver we need to make no changes - unless down the line > we find some sort of issue that requires special handling etc. There's > no harm in having a "starfive,jh7110-ccache" IMO. Yeah, sifive,ccache0 is probably the generic one which would get this working.
On Tue, 22 Nov 2022 09:07:26 +0000, Conor Dooley wrote: > On Tue, Nov 22, 2022 at 04:40:23PM +0800, Hal Feng wrote: > > On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: > > > On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: > > > > On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > > > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > > > > > This cache controller is also used on the StarFive JH7110 SoC. > > > > > > > > "... and configured identically to that of the FU740"? > > > > Anyways, > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > > > > > Actually, after looking at the next patch - why can you not fall back to > > > the fu740 one since you appear to have the same configuration as it? > > > > Right, I will drop this patch and use "sifive,fu740-c000-ccache" as > > compatible in dts. > > Uh, that's not quite what I was suggesting. Rather than using that one > in isolation, you can do the following in your dt: > "starfive,jh7110-ccache", "sifive,fu740-c000-ccache" > > And then in the driver we need to make no changes - unless down the line > we find some sort of issue that requires special handling etc. There's > no harm in having a "starfive,jh7110-ccache" IMO. Just like what microchip did as blow? Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml: properties: compatible: oneOf: - items: - enum: - sifive,ccache0 - sifive,fu540-c000-ccache - sifive,fu740-c000-ccache - starfive,jh7110-ccache - const: cache - items: - const: microchip,mpfs-ccache - const: sifive,fu540-c000-ccache - const: cache Best regards, Hal
On Tue, Nov 22, 2022 at 05:55:57PM +0800, Hal Feng wrote: > On Tue, 22 Nov 2022 09:07:26 +0000, Conor Dooley wrote: > > On Tue, Nov 22, 2022 at 04:40:23PM +0800, Hal Feng wrote: > > > On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: > > > > On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: > > > > > On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > > > > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > > > > > > > This cache controller is also used on the StarFive JH7110 SoC. > > > > > > > > > > "... and configured identically to that of the FU740"? > > > > > Anyways, > > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > > > > > > > Actually, after looking at the next patch - why can you not fall back to > > > > the fu740 one since you appear to have the same configuration as it? > > > > > > Right, I will drop this patch and use "sifive,fu740-c000-ccache" as > > > compatible in dts. > > > > Uh, that's not quite what I was suggesting. Rather than using that one > > in isolation, you can do the following in your dt: > > "starfive,jh7110-ccache", "sifive,fu740-c000-ccache" > > > > And then in the driver we need to make no changes - unless down the line > > we find some sort of issue that requires special handling etc. There's > > no harm in having a "starfive,jh7110-ccache" IMO. > > Just like what microchip did as blow? > > Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml: > properties: > compatible: > oneOf: > - items: > - enum: > - sifive,ccache0 > - sifive,fu540-c000-ccache > - sifive,fu740-c000-ccache > - starfive,jh7110-ccache > - const: cache > - items: > - const: microchip,mpfs-ccache > - const: sifive,fu540-c000-ccache > - const: cache No, I don't think this is correct either. You'd do something like: > - items: > - const: starfive,jh7110-ccache > - const: sifive,fu740-c000-ccache > - const: cache And then the driver needs no changes. Thanks, Conor.
On Tue, 22 Nov 2022 10:01:30 +0000, Conor Dooley wrote: > On Tue, Nov 22, 2022 at 05:55:57PM +0800, Hal Feng wrote: > > On Tue, 22 Nov 2022 09:07:26 +0000, Conor Dooley wrote: > > > On Tue, Nov 22, 2022 at 04:40:23PM +0800, Hal Feng wrote: > > > > On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: > > > > > On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: > > > > > > On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > > > > > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > > > > > > > > > This cache controller is also used on the StarFive JH7110 SoC. > > > > > > > > > > > > "... and configured identically to that of the FU740"? > > > > > > Anyways, > > > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > > > > > > > > > Actually, after looking at the next patch - why can you not fall back to > > > > > the fu740 one since you appear to have the same configuration as it? > > > > > > > > Right, I will drop this patch and use "sifive,fu740-c000-ccache" as > > > > compatible in dts. > > > > > > Uh, that's not quite what I was suggesting. Rather than using that one > > > in isolation, you can do the following in your dt: > > > "starfive,jh7110-ccache", "sifive,fu740-c000-ccache" > > > > > > And then in the driver we need to make no changes - unless down the line > > > we find some sort of issue that requires special handling etc. There's > > > no harm in having a "starfive,jh7110-ccache" IMO. > > > > Just like what microchip did as blow? below > > > > Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml: > > properties: > > compatible: > > oneOf: > > - items: > > - enum: > > - sifive,ccache0 > > - sifive,fu540-c000-ccache > > - sifive,fu740-c000-ccache > > - starfive,jh7110-ccache > > - const: cache > > - items: > > - const: microchip,mpfs-ccache > > - const: sifive,fu540-c000-ccache > > - const: cache > > No, I don't think this is correct either. You'd do something like: > > > - items: > > - const: starfive,jh7110-ccache > > - const: sifive,fu740-c000-ccache > > - const: cache Yeah, this is what I mean. Thanks. Best regards, Hal > > And then the driver needs no changes.
On Tue, 22 Nov 2022 at 11:16, Hal Feng <hal.feng@starfivetech.com> wrote: > > On Tue, 22 Nov 2022 10:01:30 +0000, Conor Dooley wrote: > > On Tue, Nov 22, 2022 at 05:55:57PM +0800, Hal Feng wrote: > > > On Tue, 22 Nov 2022 09:07:26 +0000, Conor Dooley wrote: > > > > On Tue, Nov 22, 2022 at 04:40:23PM +0800, Hal Feng wrote: > > > > > On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: > > > > > > On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: > > > > > > > On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > > > > > > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > > > > > > > > > > > This cache controller is also used on the StarFive JH7110 SoC. > > > > > > > > > > > > > > "... and configured identically to that of the FU740"? > > > > > > > Anyways, > > > > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > > > > > > > > > > > Actually, after looking at the next patch - why can you not fall back to > > > > > > the fu740 one since you appear to have the same configuration as it? > > > > > > > > > > Right, I will drop this patch and use "sifive,fu740-c000-ccache" as > > > > > compatible in dts. > > > > > > > > Uh, that's not quite what I was suggesting. Rather than using that one > > > > in isolation, you can do the following in your dt: > > > > "starfive,jh7110-ccache", "sifive,fu740-c000-ccache" > > > > > > > > And then in the driver we need to make no changes - unless down the line > > > > we find some sort of issue that requires special handling etc. There's > > > > no harm in having a "starfive,jh7110-ccache" IMO. > > > > > > Just like what microchip did as blow? > > below > > > > > > > Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml: > > > properties: > > > compatible: > > > oneOf: > > > - items: > > > - enum: > > > - sifive,ccache0 > > > - sifive,fu540-c000-ccache > > > - sifive,fu740-c000-ccache > > > - starfive,jh7110-ccache > > > - const: cache > > > - items: > > > - const: microchip,mpfs-ccache > > > - const: sifive,fu540-c000-ccache > > > - const: cache > > > > No, I don't think this is correct either. You'd do something like: > > > > > - items: > > > - const: starfive,jh7110-ccache > > > - const: sifive,fu740-c000-ccache For the record I don't think the line above should be there. The fu7400-c000 is a specific tapeout and pretending the JH7110 is that tapeout is not right. Especially when there is already the "sifive,ccache0" string for the generic IP. > > > - const: cache > > Yeah, this is what I mean. Thanks. > > Best regards, > Hal > > > > > And then the driver needs no changes. >
On Tue, 22 Nov 2022 11:35:28 +0100, Emil Renner Berthing wrote: > On Tue, 22 Nov 2022 at 11:16, Hal Feng <hal.feng@starfivetech.com> wrote: > > > > On Tue, 22 Nov 2022 10:01:30 +0000, Conor Dooley wrote: > > > On Tue, Nov 22, 2022 at 05:55:57PM +0800, Hal Feng wrote: > > > > On Tue, 22 Nov 2022 09:07:26 +0000, Conor Dooley wrote: > > > > > On Tue, Nov 22, 2022 at 04:40:23PM +0800, Hal Feng wrote: > > > > > > On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: > > > > > > > On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: > > > > > > > > On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > > > > > > > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > > > > > > > > > > > > > This cache controller is also used on the StarFive JH7110 SoC. > > > > > > > > > > > > > > > > "... and configured identically to that of the FU740"? > > > > > > > > Anyways, > > > > > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > > > > > > > > > > > > > Actually, after looking at the next patch - why can you not fall back to > > > > > > > the fu740 one since you appear to have the same configuration as it? > > > > > > > > > > > > Right, I will drop this patch and use "sifive,fu740-c000-ccache" as > > > > > > compatible in dts. > > > > > > > > > > Uh, that's not quite what I was suggesting. Rather than using that one > > > > > in isolation, you can do the following in your dt: > > > > > "starfive,jh7110-ccache", "sifive,fu740-c000-ccache" > > > > > > > > > > And then in the driver we need to make no changes - unless down the line > > > > > we find some sort of issue that requires special handling etc. There's > > > > > no harm in having a "starfive,jh7110-ccache" IMO. > > > > > > > > Just like what microchip did as blow? > > > > below > > > > > > > > > > Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml: > > > > properties: > > > > compatible: > > > > oneOf: > > > > - items: > > > > - enum: > > > > - sifive,ccache0 > > > > - sifive,fu540-c000-ccache > > > > - sifive,fu740-c000-ccache > > > > - starfive,jh7110-ccache > > > > - const: cache > > > > - items: > > > > - const: microchip,mpfs-ccache > > > > - const: sifive,fu540-c000-ccache > > > > - const: cache > > > > > > No, I don't think this is correct either. You'd do something like: > > > > > > > - items: > > > > - const: starfive,jh7110-ccache > > > > - const: sifive,fu740-c000-ccache > > For the record I don't think the line above should be there. The > fu7400-c000 is a specific tapeout and pretending the JH7110 is that > tapeout is not right. Especially when there is already the > "sifive,ccache0" string for the generic IP. I will change this line to - const: sifive,ccache0 Thanks for your suggestion. > > > > > - const: cache > > > > Yeah, this is what I mean. Thanks. > > > > Best regards, > > Hal > > > > > > > > And then the driver needs no changes. > >
On Tue, Nov 22, 2022 at 11:35:28AM +0100, Emil Renner Berthing wrote: > On Tue, 22 Nov 2022 at 11:16, Hal Feng <hal.feng@starfivetech.com> wrote: > > > > On Tue, 22 Nov 2022 10:01:30 +0000, Conor Dooley wrote: > > > On Tue, Nov 22, 2022 at 05:55:57PM +0800, Hal Feng wrote: > > > > On Tue, 22 Nov 2022 09:07:26 +0000, Conor Dooley wrote: > > > > > On Tue, Nov 22, 2022 at 04:40:23PM +0800, Hal Feng wrote: > > > > > > On Fri, 18 Nov 2022 19:39:52 +0800, Conor Dooley wrote: > > > > > > > On Fri, Nov 18, 2022 at 11:37:50AM +0000, Conor Dooley wrote: > > > > > > > > On Fri, Nov 18, 2022 at 09:17:10AM +0800, Hal Feng wrote: > > > > > > > > > From: Emil Renner Berthing <kernel@esmil.dk> > > > > > > > > > > > > > > > > > > This cache controller is also used on the StarFive JH7110 SoC. > > > > > > > > > > > > > > > > "... and configured identically to that of the FU740"? > > > > > > > > Anyways, > > > > > > > > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > > > > > > > > > > > > > > Actually, after looking at the next patch - why can you not fall back to > > > > > > > the fu740 one since you appear to have the same configuration as it? > > > > > > > > > > > > Right, I will drop this patch and use "sifive,fu740-c000-ccache" as > > > > > > compatible in dts. > > > > > > > > > > Uh, that's not quite what I was suggesting. Rather than using that one > > > > > in isolation, you can do the following in your dt: > > > > > "starfive,jh7110-ccache", "sifive,fu740-c000-ccache" > > > > > > > > > > And then in the driver we need to make no changes - unless down the line > > > > > we find some sort of issue that requires special handling etc. There's > > > > > no harm in having a "starfive,jh7110-ccache" IMO. > > > > > > > > Just like what microchip did as blow? > > > > below > > > > > > > > > > Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml: > > > > properties: > > > > compatible: > > > > oneOf: > > > > - items: > > > > - enum: > > > > - sifive,ccache0 > > > > - sifive,fu540-c000-ccache > > > > - sifive,fu740-c000-ccache > > > > - starfive,jh7110-ccache > > > > - const: cache > > > > - items: > > > > - const: microchip,mpfs-ccache > > > > - const: sifive,fu540-c000-ccache > > > > - const: cache > > > > > > No, I don't think this is correct either. You'd do something like: > > > > > > > - items: > > > > - const: starfive,jh7110-ccache > > > > - const: sifive,fu740-c000-ccache > > For the record I don't think the line above should be there. The > fu7400-c000 is a specific tapeout and pretending the JH7110 is that > tapeout is not right. Especially when there is already the > "sifive,ccache0" string for the generic IP. All it really says is that this h/w will work with any client (OS) that understands 'sifive,fu740-c000-ccache'. Maybe 'sifive,ccache0' is sufficient too, IDK. Rob
diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml index bf3f07421f7e..262d1d49ce25 100644 --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml @@ -25,6 +25,7 @@ select: - sifive,ccache0 - sifive,fu540-c000-ccache - sifive,fu740-c000-ccache + - starfive,jh7110-ccache required: - compatible @@ -37,6 +38,7 @@ properties: - sifive,ccache0 - sifive,fu540-c000-ccache - sifive,fu740-c000-ccache + - starfive,jh7110-ccache - const: cache - items: - const: microchip,mpfs-ccache @@ -86,6 +88,7 @@ allOf: enum: - sifive,fu740-c000-ccache - microchip,mpfs-ccache + - starfive,jh7110-ccache then: properties: @@ -105,7 +108,9 @@ allOf: properties: compatible: contains: - const: sifive,fu740-c000-ccache + enum: + - sifive,fu740-c000-ccache + - starfive,jh7110-ccache then: properties: