From patchwork Thu Nov 17 18:59:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 21876 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp575977wrr; Thu, 17 Nov 2022 11:11:24 -0800 (PST) X-Google-Smtp-Source: AA0mqf6v6PumSAJIGN1/oc5zpLRhDBxqHVtgm1+GwyJz39ajbokHwI/uhXGRutBjVGXxa+DLTdO0 X-Received: by 2002:a17:906:1585:b0:7ad:84c7:502d with SMTP id k5-20020a170906158500b007ad84c7502dmr3223474ejd.177.1668712283755; Thu, 17 Nov 2022 11:11:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668712283; cv=none; d=google.com; s=arc-20160816; b=ILBPAsaT1C2EYemB4aYmymdFkWAsi1MCXsvem437eqB8mc7PFAMZszxR8/0fWtfBE4 xINuCv7uvq58PkqGv2Xl1gGvh99Ur6LKgcwTuMzNJrAOwlh/aYEhXtAqhZ8FcGTkLHaX nG2vmAY1sVJaiIEYgr7pzI5dlrKpHgiafKXDNkJ9a1yUSOlVFoKf4ofIHIFGZ6JR64Ql RAeR7/jz7qK8cj4SVrTNdP13RqA8zsLlGRPyDEiZJqv5XEyuC8DJ6Y3LVMU1TNqtZGrk TYdU+r5Wiopw2dUJ8ir+c5n8jvyCJ152tI+/fJM9bOv1712GCfKLuNGxiNKhDeuITNvO p1Xw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=Xip6KOHM2aspJGzvQXTsIs2TJEqmK1k9KQkxLV2Ouwo=; b=sM3NC0MaQolgOX34MzlmRjnW+O/CE0pPx6+IXuULMvjuxV/I11ZZfVcK3bv6jqqULt s3b0zSKmeeiDlwlstp906lOUpeTSx8hELA6nSqnA9D6jHTBvAJBd/MFCGgBHzX7WjLv9 pLRIQQuvGlsZp0w7teT6Cni1DuBdtckSih0hVUgKIWGSHvBKz+dyezIjeEUaFL4lIOfq 553YX1DfAhZAQLARLSpcrB9JC0GFGMahl4Zng47lhuno8wARHTH4Mkh3cwVvoDQT0snH Oq+ABRe3B8dtwP9qHvy9X8r7FwSoFH8mmai1U2LFE7mfLaZo4j+32REbw8nbZ/eWCqDY U8Bw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=iZTnGy1V; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id hq8-20020a1709073f0800b0078334ccc570si1117109ejc.328.2022.11.17.11.10.58; Thu, 17 Nov 2022 11:11:23 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=iZTnGy1V; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235043AbiKQTBZ (ORCPT + 99 others); Thu, 17 Nov 2022 14:01:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53128 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232532AbiKQTBX (ORCPT ); Thu, 17 Nov 2022 14:01:23 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 813E87EC81 for ; Thu, 17 Nov 2022 11:01:22 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 3B783B82177 for ; Thu, 17 Nov 2022 19:01:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 32F29C433D6; Thu, 17 Nov 2022 19:01:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1668711679; bh=J5e/2e2A0QN5e/QvG58jvwr/TirjLnTq6GC/R3sYRoU=; h=From:To:Cc:Subject:Date:From; b=iZTnGy1VC1myIEDI3AGe/Md20ChfqPmH9cCimtVx08ODlpvHuaKXSoM5K8oH+6rNM zU+P9sA0nuir3N14Ip4crIHh5hwgTMKGtRArIMl9mEn73adrtY5y4CR9e2/lBrAqPu V04yljRQtVtb/87LdUNXBnRGCB11TQnzsDG2zWA7VPn4dPWQpNQmW1MFh4hYCy7geV D94M+gMfdGmq7F/uK5zyZAVXbCELx6tf+PQ3UZwz2GZox9WNkikUXD0eKbX/uyiGfj DHwP+oNUo9fHoPIoZvvSiPPgSOG1SH27OGfmZgkIRUVqov/25wUVdO7ZW8nfsBcQb4 Z6/SCRQBTnAdQ== From: Conor Dooley To: Marc Zyngier Cc: Thomas Gleixner , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Conor Dooley Subject: [PATCH] irqchip/sifive-plic: default to enabled Date: Thu, 17 Nov 2022 18:59:43 +0000 Message-Id: <20221117185942.3896559-1-conor@kernel.org> X-Mailer: git-send-email 2.37.2 MIME-Version: 1.0 X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749771651767555872?= X-GMAIL-MSGID: =?utf-8?q?1749771651767555872?= From: Conor Dooley The SiFive PLIC driver is used by all current implementations, including those that do not have a SiFive PLIC. Default the driver to enabled, with the intention of later removing the current "every SOC selects this" situation in Kconfig.socs at the moment. The speculative "potential others" in the description no longer makes any sense, as the driver is always used. Update the Kconfig symbol's description to reflect the driver's ubiquitous state. Signed-off-by: Conor Dooley --- Hey Marc, I recall some discussion when this driver was extended to other PLICs a few months ago: https://lore.kernel.org/linux-riscv/20511a05f39408c8ffbcc98923c4abd2@kernel.org/ Perhaps I got the wrong impression, but it seemed to me that you intend for future implementations to reuse this driver where possible? I'd like to think, and surely will be proven wrong, that ~all future plic implementations should be similar enough to fit that bill. It's kinda on this basis that I figure switching this thing to default y should be okay. It's already only buildable on RISC-V & every implementation uses it, so no difference there. Thanks, Conor. --- drivers/irqchip/Kconfig | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 7ef9f5e696d3..6f99919ba66c 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -553,14 +553,15 @@ config RISCV_INTC config SIFIVE_PLIC bool "SiFive Platform-Level Interrupt Controller" depends on RISCV + default y select IRQ_DOMAIN_HIERARCHY select GENERIC_IRQ_EFFECTIVE_AFF_MASK if SMP help - This enables support for the PLIC chip found in SiFive (and - potentially other) RISC-V systems. The PLIC controls devices - interrupts and connects them to each core's local interrupt - controller. Aside from timer and software interrupts, all other - interrupt sources are subordinate to the PLIC. + This enables support for the PLIC chip found in SiFive & other + RISC-V systems. The PLIC controls devices interrupts and connects + them to each core's local interrupt controller. Aside from timer + and software interrupts, all other interrupt sources are + subordinate to the PLIC. If you don't know what to do here, say Y.