From patchwork Thu Nov 17 12:25:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tomi Valkeinen X-Patchwork-Id: 21621 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp371367wrr; Thu, 17 Nov 2022 04:31:00 -0800 (PST) X-Google-Smtp-Source: AA0mqf7ODZmS5XJF9REevSAsT9Hpr5N2XI9aFqgHF1FhGzSvX6WZwgg2ahqCC3yA0qDQygZtz9HV X-Received: by 2002:a63:c51:0:b0:470:4522:f64a with SMTP id 17-20020a630c51000000b004704522f64amr1768823pgm.348.1668688260493; Thu, 17 Nov 2022 04:31:00 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668688260; cv=none; d=google.com; s=arc-20160816; b=iVl8rwdin9I6KmM108cxqFtDS+bVphglcvLdxVrneXJdTz2qkwaV7/2JmpWDeB+IML nbEdpfXxfXalBFtr30kLZbNzPJugoepNyG7wH2l4exBJn5gwj9vmr76p180qQdLXVB35 nEG1o/xaF8c2pEXoSiERB4TUH3UnnndBRp+OKd1k8XtYD3jdbFSxaLnPNfVcjJSSxPAj AjkjD/74kHtgfmhYrGZ1efVdTX4K0LKCkN9Wwxn/Vtp+4CdmNMX0BjREj/AEuDAjkwDs AJzmHa0oL5agb4uNwxiM/eP+UWu/HAEoLC1hORI5UopNUdKonneAAi/LNrTU7IkoBwZD 3qUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1AAHJ577olN0GtYVVstJ0fzVWfZ58ap+NLxEUADVugo=; b=Aawp2Lof/HpZt/CNJtGM94g2r4m+9SVuvrtpvOF8wsdyhupRpUuNpmh2YhGm//Rt8F zJw7zr+VM1evgZvzTGo0sg5kn+it1xMCwUq6vsbPmyIS93Osau+AAplgEvorVAjy4g0M s6Rd4uLK/ZsZh5Tzdob/hlXNs++Sy9Ulp2UrXy4aJREswwKI8xeLdmb7Yh+xopRdsfkH SR3w7YovjXjZVZTV1eXRKx2huJhnaBgkcViecRD5pkgQk0ny/imTZUR5HyWOCvMf+127 xu86X28z0Y11iFiKf4PxyYxaLQsp3ZL4yRr3A9VtqsZRttXQKz1AVkJodBpU89b5OKgi fdtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=tmGJOOim; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c4-20020a630d04000000b0046ff4e3a5d4si850761pgl.260.2022.11.17.04.30.47; Thu, 17 Nov 2022 04:31:00 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass (test mode) header.i=@ideasonboard.com header.s=mail header.b=tmGJOOim; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240145AbiKQM03 (ORCPT + 99 others); Thu, 17 Nov 2022 07:26:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51424 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240107AbiKQM0Q (ORCPT ); Thu, 17 Nov 2022 07:26:16 -0500 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3A4BD70A17; Thu, 17 Nov 2022 04:26:15 -0800 (PST) Received: from desky.lan (91-154-32-225.elisa-laajakaista.fi [91.154.32.225]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 49D421861; Thu, 17 Nov 2022 13:26:11 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1668687972; bh=IHdH+5Jq8YXyln1IMcVU8yG275BjH00+O71gzLrZch8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=tmGJOOimaOkE3OqehCKtn+26szR2kXVe7nsdn101d16Eb2GK57i2UP7chM5my7/I2 0tK9qwh1TVt3BQntpPJv1g0WZ9F7/p7A6VdEVn8sgr/Lx8nEc98EqjUoamjLQAjjQH c0vOYnlA5yyzZsHnxFyMV6U59x2PiRsPaqlBBKwQ= From: Tomi Valkeinen To: Laurent Pinchart , Kieran Bingham , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , dri-devel@lists.freedesktop.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrzej Hajda , Neil Armstrong , Robert Foss , Jonas Karlman , Jernej Skrabec , Tomi Valkeinen Subject: [PATCH v1 5/8] arm64: dts: renesas: white-hawk-cpu: Add DP output support Date: Thu, 17 Nov 2022 14:25:44 +0200 Message-Id: <20221117122547.809644-6-tomi.valkeinen@ideasonboard.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> References: <20221117122547.809644-1-tomi.valkeinen@ideasonboard.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749746461373583962?= X-GMAIL-MSGID: =?utf-8?q?1749746461373583962?= From: Tomi Valkeinen Add DT nodes needed for the mini DP connector. The DP is driven by sn65dsi86, which in turn gets the pixel data from the SoC via DSI. Signed-off-by: Tomi Valkeinen Reviewed-by: Kieran Bingham Reviewed-by: Laurent Pinchart --- .../dts/renesas/r8a779g0-white-hawk-cpu.dtsi | 94 +++++++++++++++++++ 1 file changed, 94 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi index c10740aee9f6..8aab859aac7a 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0-white-hawk-cpu.dtsi @@ -97,6 +97,15 @@ memory@600000000 { reg = <0x6 0x00000000 0x1 0x00000000>; }; + reg_1p2v: regulator-1p2v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-boot-on; + regulator-always-on; + }; + reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; @@ -114,6 +123,24 @@ reg_3p3v: regulator-3p3v { regulator-boot-on; regulator-always-on; }; + + mini-dp-con { + compatible = "dp-connector"; + label = "CN5"; + type = "mini"; + + port { + mini_dp_con_in: endpoint { + remote-endpoint = <&sn65dsi86_out>; + }; + }; + }; + + sn65dsi86_refclk: clk-x6 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <38400000>; + }; }; &avb0 { @@ -134,6 +161,23 @@ phy0: ethernet-phy@0 { }; }; +&dsi0 { + status = "okay"; + + ports { + port@1 { + dsi0_out: endpoint { + remote-endpoint = <&sn65dsi86_in>; + data-lanes = <1 2 3 4>; + }; + }; + }; +}; + +&du { + status = "okay"; +}; + &extal_clk { clock-frequency = <16666666>; }; @@ -172,6 +216,51 @@ eeprom@50 { }; }; +&i2c1 { + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; + + status = "okay"; + clock-frequency = <400000>; + + bridge@2c { + compatible = "ti,sn65dsi86"; + reg = <0x2c>; + + clocks = <&sn65dsi86_refclk>; + clock-names = "refclk"; + + interrupt-parent = <&intc_ex>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + + enable-gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; + + vccio-supply = <®_1p8v>; + vpll-supply = <®_1p8v>; + vcca-supply = <®_1p2v>; + vcc-supply = <®_1p2v>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + sn65dsi86_in: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + sn65dsi86_out: endpoint { + remote-endpoint = <&mini_dp_con_in>; + }; + }; + }; + }; +}; + &mmc0 { pinctrl-0 = <&mmc_pins>; pinctrl-1 = <&mmc_pins>; @@ -221,6 +310,11 @@ i2c0_pins: i2c0 { function = "i2c0"; }; + i2c1_pins: i2c1 { + groups = "i2c1"; + function = "i2c1"; + }; + keys_pins: keys { pins = "GP_5_0", "GP_5_1", "GP_5_2"; bias-pull-up;