From patchwork Thu Nov 17 11:08:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 21577 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp339012wrr; Thu, 17 Nov 2022 03:11:44 -0800 (PST) X-Google-Smtp-Source: AA0mqf6fD+T+0LcovxKUYUBnpgJiMb+rgjcG/neuADILK5kCQbw4AnJ1Sdhrz9lGcsZ6sbVpOU+s X-Received: by 2002:a17:90b:1282:b0:214:1804:d96b with SMTP id fw2-20020a17090b128200b002141804d96bmr2276603pjb.90.1668683503858; Thu, 17 Nov 2022 03:11:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668683503; cv=none; d=google.com; s=arc-20160816; b=wYKMlk+m+/3AsgzMqp3h/uFQc2NPacxvRmRcnetUfN6zlctdsQZJDfhwWIbEt5yojD P5ePbByrU3ateK9ok6Iij1tP/amgZXky9qpgPr9tE9viO3fzgfUBNfMCUTors7RRYHlR T/EtjaFMHL3HsQ+poAlpdOFu0ryGKOSb+TJ+aXEiN585nwPaABmJAK30Yl5bN6bUiLOb xHMk0ib7gc1G0lrZmccT7h81vx571FhdEUu5y9nFaB63f5jdt6UIVt6R12FygwFM/xaO l48wT8bjyHfVht8YO7+lHJREI1gzTBZNXZzjxdeBTrUi6HAKxHqfdvrlJT/WRjXygAx9 ArjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=MFKxy3kbakFchJNSIPgMdW8uXCXs6zXv162PRaFFwHk=; b=NQE0be8MxVhjFdyKWVUF6DL2lSCafzonjy4kax/hoNFVuERRUBchT+wx+VQb4wQMfw rmUPqJotZUNMTStdUnjbz8mV7zK3SxHv+/nmoFc8F0Lnp3fIjBiyDm33nAA6NrUbP0kM T2+Xl1VrOb4lXrnZ5jLok6n3vDDTZuaDy/adnrhac/7YhYlnXqQqr60vs+EPF7pD752R 2V/2vxPQF2yIErgoZzQwS4VxvWrXfTF309yHnfB/VIvqzhYE9oBfuWh4OSXgn4ywLZzq SPKB/SIQhpoRwiAPZGmbOU9mXNNMTiywuimNmrMGnFS4IvB7aM69aSas1Jz/baFq817C eQyA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Cwwbtuls; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id c20-20020a6566d4000000b00476cc6391fcsi655082pgw.445.2022.11.17.03.11.27; Thu, 17 Nov 2022 03:11:43 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=Cwwbtuls; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239783AbiKQLJg (ORCPT + 99 others); Thu, 17 Nov 2022 06:09:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239849AbiKQLII (ORCPT ); Thu, 17 Nov 2022 06:08:08 -0500 Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 03757450A7; Thu, 17 Nov 2022 03:08:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1668683282; x=1700219282; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vb4Kjx+Zzgw7pJ7ccpP6XKDAM1GDRLtTdQAtD7V1YcM=; b=CwwbtulsbSftGJAX21u1zR9QCiyXrEL2fbOyIRrEVrpTRUVuCqi/TszF mziKyzTqaqfE2HxLeduDdpybGxFoL4MPOsZiGOmdvqQKryhYygk8URHfh HjZh4yGXFOfZyA3uHhpcC6ObLwdPE1IeZ0x6+1nBXtmJb07s303UmpMCh iogW+xpW/izq3wGLOVCUPI7U3Js/ggbCEQG87jAu/q/e1fH5R8r+hoZ5a b0iaDrq0O38k5fN2PM7q+lmHb3MDM7XqEupbCttZKI1iBYiyd4U5VIPcs bXEzXKaC70H/RnBwGH5vql7HX5FTTxPhrQnOzlB7sv8mKYRP6FLjxl0IV g==; X-IronPort-AV: E=McAfee;i="6500,9779,10533"; a="293218217" X-IronPort-AV: E=Sophos;i="5.96,171,1665471600"; d="scan'208";a="293218217" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Nov 2022 03:08:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10533"; a="639763895" X-IronPort-AV: E=Sophos;i="5.96,171,1665471600"; d="scan'208";a="639763895" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga002.jf.intel.com with ESMTP; 17 Nov 2022 03:07:58 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 0214C2F3; Thu, 17 Nov 2022 13:08:23 +0200 (EET) From: Andy Shevchenko To: Andy Shevchenko , Mika Westerberg , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Hans de Goede , Thierry Reding , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, linux-pwm@vger.kernel.org Cc: Andy Shevchenko , Linus Walleij Subject: [PATCH v5 6/7] pwm: lpss: Add devm_pwm_lpss_probe() stub Date: Thu, 17 Nov 2022 13:08:05 +0200 Message-Id: <20221117110806.65470-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221117110806.65470-1-andriy.shevchenko@linux.intel.com> References: <20221117110806.65470-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749741473671210401?= X-GMAIL-MSGID: =?utf-8?q?1749741473671210401?= In case the PWM LPSS module is not provided, allow users to be compiled with the help of the devm_pwm_lpss_probe() stub. Signed-off-by: Andy Shevchenko Acked-by: Thierry Reding Reviewed-by: Mika Westerberg --- include/linux/platform_data/x86/pwm-lpss.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/include/linux/platform_data/x86/pwm-lpss.h b/include/linux/platform_data/x86/pwm-lpss.h index c852fe24fe2a..6ef21b8baec7 100644 --- a/include/linux/platform_data/x86/pwm-lpss.h +++ b/include/linux/platform_data/x86/pwm-lpss.h @@ -4,6 +4,8 @@ #ifndef __PLATFORM_DATA_X86_PWM_LPSS_H #define __PLATFORM_DATA_X86_PWM_LPSS_H +#include +#include #include struct device; @@ -27,7 +29,16 @@ struct pwm_lpss_boardinfo { bool other_devices_aml_touches_pwm_regs; }; +#if IS_REACHABLE(CONFIG_PWM_LPSS) struct pwm_lpss_chip *devm_pwm_lpss_probe(struct device *dev, void __iomem *base, const struct pwm_lpss_boardinfo *info); +#else +static inline +struct pwm_lpss_chip *devm_pwm_lpss_probe(struct device *dev, void __iomem *base, + const struct pwm_lpss_boardinfo *info) +{ + return ERR_PTR(-ENODEV); +} +#endif /* CONFIG_PWM_LPSS */ #endif /* __PLATFORM_DATA_X86_PWM_LPSS_H */