From patchwork Thu Nov 17 10:52:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tudor Ambarus X-Patchwork-Id: 21555 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:adf:f944:0:0:0:0:0 with SMTP id q4csp331245wrr; Thu, 17 Nov 2022 02:54:45 -0800 (PST) X-Google-Smtp-Source: AA0mqf7ykqYe4x4h0T+1PEN1RqV8yC385EPZ4+x28+0mGJtO8aNcWwvAPHKYCxUL/eAfbo20fPJB X-Received: by 2002:a17:903:48d:b0:17c:620f:13ac with SMTP id jj13-20020a170903048d00b0017c620f13acmr2322640plb.9.1668682485561; Thu, 17 Nov 2022 02:54:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1668682485; cv=none; d=google.com; s=arc-20160816; b=gawwlFMRQbQ3RaAyposFIiQRDL0PYhe03yBnQz9IoDB02OYkRx7EcAN2XNBbmW982y r52etO9uRm9M8gfZHUKv+9BoMAUIxDV0iNyYD+BB8NHh6aIbWeIZYkK91Cum89J4X+l1 KMgBhuw9TGHFaVOGE9BJuiTt4iyj5SaBcCaqR7SK+qng6hYqWlcnVxO9RsNnWFm6zkoi 6l6kUcB8jJPNyFXyDREAPbjlRgbjeYlomx3Xopcqmp+vUCCS7o8PQv9I3qYoD18xEFfs QXL/4XWJxJEpOm2wFICrck99TJkXg/AB0vjbSwDQrYIja59VZjyLzfx9A/9N/XdSKezL NHhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=F2IG5+62Gp4oEYmNS6q9lriIys1aspQtY0vlf4AeQwg=; b=JdUX5bRL06e/jtQNfl2FM18KxuqNxIzTlaZ4JGwEy7voa7+E61dCAvO9Zn0mqwSbDa at8VkSjcHYIw1G0uEuH7Paw10UA0dEGxDf4ze8kFNjn3JsRXnK/SI93o6DyMbgTIWGzZ v4AGdComYUWwR3Qs05biJi+TfBYmJ3HGFnM9tKCIYrhMKvFl4QU+9CyqowX+Y0tVOtPz GlkwCExRiB5jLWQlRKal2YnnIXGnUwLY8fsFZXitNPDGZLAyXSw+GD+F6JhlsJY4tbwz RBd1VXSs6r5c64K+2miCprR6LOSqmS8YaXx4w3mrvVYPqOVcbugmVHB+YdPc50EnHdvZ 2UHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=sRHyVYoF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id ix3-20020a170902f80300b00178b95aa01fsi582285plb.614.2022.11.17.02.54.32; Thu, 17 Nov 2022 02:54:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=sRHyVYoF; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239434AbiKQKxq (ORCPT + 99 others); Thu, 17 Nov 2022 05:53:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234058AbiKQKxG (ORCPT ); Thu, 17 Nov 2022 05:53:06 -0500 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D51275E9E5; Thu, 17 Nov 2022 02:52:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1668682377; x=1700218377; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=gNtn9WfsbwYVLh4+RkqUoRwPVNMtyYltmpBOWMDfWsw=; b=sRHyVYoFhEXKVU58uS4G4lS9tKNIIeHwI7o5d1sT6uHzqZotaqPR8JgY GE5VuxTTjqUNDlJ7/9y165D2U/voNyLsmf+U3qT8CFObA+3zkyl9c3W5D RNxPujqFzSGS1bPWzk2/+YPG/i0pxiKfMOOfvqJKVv4EfG07tk88kcIS2 DK8gje8bJKJAPN5UtIPWxHw2ReVTh8UX8OUwjDkEO2rJNEfgVQerhu7q9 UzkSE6EIshgToMfLPyy+OoqLBxcQSfn2a1IbIA7Zw9LnnYhBP/4TIwle+ Z4s8nKRzsya8PHEyqlK+GFkauoQBzKNe+bAeWCLcWcL7EQ3YRCOwHnvgF A==; X-IronPort-AV: E=Sophos;i="5.96,171,1665471600"; d="scan'208";a="123873129" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 17 Nov 2022 03:52:56 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.87.72) by chn-vm-ex02.mchp-main.com (10.10.87.72) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Thu, 17 Nov 2022 03:52:56 -0700 Received: from ROB-ULT-M18064N.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Thu, 17 Nov 2022 03:52:53 -0700 From: Tudor Ambarus To: , , , , , CC: , , , , , Tudor Ambarus Subject: [PATCH 1/8] spi: dt-bindings: Introduce spi-cs-setup-ns property Date: Thu, 17 Nov 2022 12:52:42 +0200 Message-ID: <20221117105249.115649-2-tudor.ambarus@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221117105249.115649-1-tudor.ambarus@microchip.com> References: <20221117105249.115649-1-tudor.ambarus@microchip.com> MIME-Version: 1.0 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749740406081505382?= X-GMAIL-MSGID: =?utf-8?q?1749740406081505382?= SPI NOR flashes have specific cs-setup time requirements without which they can't work at frequencies close to their maximum supported frequency, as they miss the first bits of the instruction command. Unrecognized commands are ignored, thus the flash will be unresponsive. Introduce the spi-cs-setup-ns property to allow spi devices to specify their cs setup time. Signed-off-by: Tudor Ambarus --- .../devicetree/bindings/spi/spi-peripheral-props.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml index dca677f9e1b9..ead2cccf658f 100644 --- a/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/spi/spi-peripheral-props.yaml @@ -44,6 +44,11 @@ properties: description: Maximum SPI clocking speed of the device in Hz. + spi-cs-setup-ns: + description: + Delay in nanosecods to be introduced by the controller after CS is + asserted. + spi-rx-bus-width: description: Bus width to the SPI bus used for read transfers.