diff mbox series

[v2,1/3] media: rkisp1: Add NV16M and NV61M to output formats

Message ID 20221117084217.3892680-2-paul.elder@ideasonboard.com
State New
Headers
Series media: rkisp1: Miscellaneous improvements |

Commit Message

Paul Elder Nov. 17, 2022, 8:42 a.m. UTC 
  Add support for NV16M and NV61M as output formats. As NV16, NV61, NV12M
and NV21M are already supported, the infrastructure is already in place
to support NV16M and NV61M, so it is sufficient to simply add relevant
entries to the list of output formats.

Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
---
 .../platform/rockchip/rkisp1/rkisp1-capture.c | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

Comments

Dafna Hirschfeld Nov. 19, 2022, 10:59 a.m. UTC | #1 
On 17.11.2022 17:42, Paul Elder wrote:
>Add support for NV16M and NV61M as output formats. As NV16, NV61, NV12M
>and NV21M are already supported, the infrastructure is already in place
>to support NV16M and NV61M, so it is sufficient to simply add relevant
>entries to the list of output formats.
>
>Signed-off-by: Paul Elder <paul.elder@ideasonboard.com>
>Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Reviewed-by: Dafna Hirschfeld <dafna@fastmail.com>

>---
> .../platform/rockchip/rkisp1/rkisp1-capture.c | 22 +++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
>diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
>index d4540684ea9a..7695ef134908 100644
>--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
>+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
>@@ -110,6 +110,16 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_mp_fmts[] = {
> 		.uv_swap = 1,
> 		.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
> 		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
>+	}, {
>+		.fourcc = V4L2_PIX_FMT_NV16M,
>+		.uv_swap = 0,
>+		.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
>+		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
>+	}, {
>+		.fourcc = V4L2_PIX_FMT_NV61M,
>+		.uv_swap = 1,
>+		.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
>+		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
> 	}, {
> 		.fourcc = V4L2_PIX_FMT_YVU422M,
> 		.uv_swap = 1,
>@@ -237,6 +247,18 @@ static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = {
> 		.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
> 		.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
> 		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
>+	}, {
>+		.fourcc = V4L2_PIX_FMT_NV16M,
>+		.uv_swap = 0,
>+		.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
>+		.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
>+		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
>+	}, {
>+		.fourcc = V4L2_PIX_FMT_NV61M,
>+		.uv_swap = 1,
>+		.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
>+		.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
>+		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
> 	}, {
> 		.fourcc = V4L2_PIX_FMT_YVU422M,
> 		.uv_swap = 1,
>-- 
>2.35.1
>
diff mbox series

Patch

diff --git a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
index d4540684ea9a..7695ef134908 100644
--- a/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
+++ b/drivers/media/platform/rockchip/rkisp1/rkisp1-capture.c
@@ -110,6 +110,16 @@  static const struct rkisp1_capture_fmt_cfg rkisp1_mp_fmts[] = {
 		.uv_swap = 1,
 		.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
 		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
+	}, {
+		.fourcc = V4L2_PIX_FMT_NV16M,
+		.uv_swap = 0,
+		.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
+		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
+	}, {
+		.fourcc = V4L2_PIX_FMT_NV61M,
+		.uv_swap = 1,
+		.write_format = RKISP1_MI_CTRL_MP_WRITE_YUV_SPLA,
+		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
 	}, {
 		.fourcc = V4L2_PIX_FMT_YVU422M,
 		.uv_swap = 1,
@@ -237,6 +247,18 @@  static const struct rkisp1_capture_fmt_cfg rkisp1_sp_fmts[] = {
 		.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
 		.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
 		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
+	}, {
+		.fourcc = V4L2_PIX_FMT_NV16M,
+		.uv_swap = 0,
+		.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
+		.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
+		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
+	}, {
+		.fourcc = V4L2_PIX_FMT_NV61M,
+		.uv_swap = 1,
+		.write_format = RKISP1_MI_CTRL_SP_WRITE_SPLA,
+		.output_format = RKISP1_MI_CTRL_SP_OUTPUT_YUV422,
+		.mbus = MEDIA_BUS_FMT_YUYV8_2X8,
 	}, {
 		.fourcc = V4L2_PIX_FMT_YVU422M,
 		.uv_swap = 1,