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[2620:137:e000::1:20]) by mx.google.com with ESMTP id t22-20020a63dd16000000b004700e9f03cdsi470929pgg.426.2022.11.17.00.44.08; Thu, 17 Nov 2022 00:44:21 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239565AbiKQIio (ORCPT + 99 others); Thu, 17 Nov 2022 03:38:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239261AbiKQIim (ORCPT ); Thu, 17 Nov 2022 03:38:42 -0500 Received: from mail-sh.amlogic.com (mail-sh.amlogic.com [58.32.228.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0351E3F07A; Thu, 17 Nov 2022 00:37:44 -0800 (PST) Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Thu, 17 Nov 2022 16:37:42 +0800 From: Jiucheng Xu To: Jiucheng Xu , Will Deacon , Mark Rutland , Rob Herring , Krzysztof Kozlowski CC: Jianxin Pan , Kelvin Zhang , Krzysztof Kozlowski , , , , Subject: [PATCH v11 3/3] dt-binding: perf: Add Amlogic DDR PMU Date: Thu, 17 Nov 2022 16:34:17 +0800 Message-ID: <20221117083419.2084264-3-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221117083419.2084264-1-jiucheng.xu@amlogic.com> References: <20221117083419.2084264-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.88.11.200] X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749732201331062364?= X-GMAIL-MSGID: =?utf-8?q?1749732201331062364?= Add binding documentation for the Amlogic G12 series DDR performance monitor unit. Signed-off-by: Jiucheng Xu Reviewed-by: Krzysztof Kozlowski --- Changes v10 -> v11: - No change Changes v9 -> v10: - No change Changes v8 -> v9: - No change Changes v7 -> v8: - No change Changes v6 -> v7: - No change Changes v5 -> v6: - remove blank line Changes v4 -> v5: - Remove "items" in compatible since have only one item - Condense description of reg - Rename node - Split one reg into two reg items. - Binding go first Changes v3 -> v4: - Fix "$id: relative path/filename doesn't match actual path or filename" warning Changes v2 -> v3: - Remove oneOf - Add descriptions - Fix compiling warning Changes v1 -> v2: - Rename file, from aml_ddr_pmu.yaml to amlogic,g12_ddr_pmu.yaml - Delete "model", "dmc_nr", "chann_nr" new properties - Fix compiling error --- .../bindings/perf/amlogic,g12-ddr-pmu.yaml | 54 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml diff --git a/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml b/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml new file mode 100644 index 000000000000..50f46a6898b1 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/amlogic,g12-ddr-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic G12 DDR performance monitor + +maintainers: + - Jiucheng Xu + +description: | + Amlogic G12 series SoC integrate DDR bandwidth monitor. + A timer is inside and can generate interrupt when timeout. + The bandwidth is counted in the timer ISR. Different platform + has different subset of event format attribute. + +properties: + compatible: + enum: + - amlogic,g12a-ddr-pmu + - amlogic,g12b-ddr-pmu + - amlogic,sm1-ddr-pmu + + reg: + items: + - description: DMC bandwidth register space. + - description: DMC PLL register space. + + interrupts: + items: + - description: The IRQ of the inside timer timeout. + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + pmu { + #address-cells=<2>; + #size-cells=<2>; + + pmu@ff638000 { + compatible = "amlogic,g12a-ddr-pmu"; + reg = <0x0 0xff638000 0x0 0x100>, + <0x0 0xff638c00 0x0 0x100>; + interrupts = ; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index b76c4deddf22..8b102a928081 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1099,6 +1099,7 @@ L: linux-amlogic@lists.infradead.org S: Supported W: http://www.amlogic.com F: Documentation/admin-guide/perf/meson-ddr-pmu.rst +F: Documentation/devicetree/bindings/perf/amlogic,g12-ddr-pmu.yaml F: drivers/perf/amlogic/ F: include/soc/amlogic/