[v3,1/4] clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets

Message ID 20221116203520.8300-1-giulio.benetti@benettiengineering.com
State New
Headers
Series [v3,1/4] clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets |

Commit Message

Giulio Benetti Nov. 16, 2022, 8:35 p.m. UTC
  Fix IMXRT1050_CLK_LCDIF_APB offsets.

Cc: Jesse Taube <mr.bossman075@gmail.com>
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
V1->V2:
* nothing done
V2->V3:
* added commit log and not only subject as suggested by Jesse Taube
---
 drivers/clk/imx/clk-imxrt1050.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
  

Comments

Fabio Estevam Nov. 16, 2022, 8:52 p.m. UTC | #1
Hi Giulio,

On Wed, Nov 16, 2022 at 5:35 PM Giulio Benetti
<giulio.benetti@benettiengineering.com> wrote:
>
> Fix IMXRT1050_CLK_LCDIF_APB offsets.
>
> Cc: Jesse Taube <mr.bossman075@gmail.com>
> Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>

Since this is a fix, please add a Fixes tag.
  
Giulio Benetti Nov. 16, 2022, 9:05 p.m. UTC | #2
Hi Fabio,

On 16/11/22 21:52, Fabio Estevam wrote:
> Hi Giulio,
> 
> On Wed, Nov 16, 2022 at 5:35 PM Giulio Benetti
> <giulio.benetti@benettiengineering.com> wrote:
>>
>> Fix IMXRT1050_CLK_LCDIF_APB offsets.
>>
>> Cc: Jesse Taube <mr.bossman075@gmail.com>
>> Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
> 
> Since this is a fix, please add a Fixes tag.

Fixes: 7154b046d8f3 ("clk: imx: Add initial support for i.MXRT1050 clock 
driver")

Do you want me to send a V4 for these patches with the Fixes tag?

Best regards
  

Patch

diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
index 9539d35588ee..26108e9f7e67 100644
--- a/drivers/clk/imx/clk-imxrt1050.c
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -140,7 +140,7 @@  static int imxrt1050_clocks_probe(struct platform_device *pdev)
 	hws[IMXRT1050_CLK_USDHC1] = imx_clk_hw_gate2("usdhc1", "usdhc1_podf", ccm_base + 0x80, 2);
 	hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
 	hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
-	hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x74, 10);
+	hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x70, 28);
 	hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
 	hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
 	imx_check_clk_hws(hws, IMXRT1050_CLK_END);