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The PHY will then be probed, independent of if it can be found on the bus or not, and that probing will enable the GPIO. ethernet-phy-id is read from ethenet register dump reg2 and reg3. Fix following warning. [ 12.323417] rk_gmac-dwmac fe010000.ethernet eth0: Register MEM_TYPE_PAGE_POOL RxQ-0 [ 12.324078] rk_gmac-dwmac fe010000.ethernet eth0: no phy at addr -1 [ 12.324099] rk_gmac-dwmac fe010000.ethernet eth0: __stmmac_open: Cannot attach to PHY (error: -19) Signed-off-by: Anand Moon --- V2: new to the patch series. alarm@rock-3a:~$ sudo ethtool -d eth0 [sudo] password for alarm: ST GMAC Registers GMAC Registers Reg0 0x08072203 Reg1 0x00000000 Reg2 0x00000404 Reg3 0x00000000 Reg4 0x00000002 --- arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts index 9f84a23a8789..fe36156a5017 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts @@ -585,7 +585,7 @@ &i2s2_2ch { &mdio1 { rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; + compatible = "ethernet-phy-id0000.0404", "ethernet-phy-ieee802.3-c22"; reg = <0x0>; pinctrl-names = "default"; pinctrl-0 = <ð_phy_rst>, <ð_phy_int>;