diff mbox series

[v2,2/4] clk: imx: imxrt1050: add IMXRT1050_CLK_LCDIF_PIX clock gate

Message ID 20221115193244.10484-2-giulio.benetti@benettiengineering.com
State New
Headers
Series [v2,1/4] clk: imx: imxrt1050: fix IMXRT1050_CLK_LCDIF_APB offsets |

Commit Message

Giulio Benetti Nov. 15, 2022, 7:32 p.m. UTC 
  Cc: Jesse Taube <mr.bossman075@gmail.com>
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
---
V1->V2:
* nothing done
---
 drivers/clk/imx/clk-imxrt1050.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Jesse T Nov. 15, 2022, 8:43 p.m. UTC | #1 
On 11/15/22 14:32, Giulio Benetti wrote:
> Cc: Jesse Taube <mr.bossman075@gmail.com>
> Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
> ---
> V1->V2:
> * nothing done
> ---
>   drivers/clk/imx/clk-imxrt1050.c | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
> index 26108e9f7e67..39f77c03b892 100644
> --- a/drivers/clk/imx/clk-imxrt1050.c
> +++ b/drivers/clk/imx/clk-imxrt1050.c
> @@ -141,6 +141,7 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
>   	hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
>   	hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
>   	hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x70, 28);
> +	hws[IMXRT1050_CLK_LCDIF_PIX] = imx_clk_hw_gate2("lcdif_pix", "lcdif", ccm_base + 0x74, 10);
I think it makes sense to squash this with PATCH1 because it changes the 
same file. It also will make the change more understandable as I swapped 
the offsets for PIX clock and APB clock accidentally. I'm not sure if 
this is necessary but I think there should be a commit description. 
Otherwise
Acked-by: Jesse Taube <mr.bossman075@gmail.com>

Thanks,
Jesse Taube
>   	hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
>   	hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
>   	imx_check_clk_hws(hws, IMXRT1050_CLK_END);
Giulio Benetti Nov. 16, 2022, 8:27 p.m. UTC | #2 
Hi Jesse,

On 15/11/22 21:43, Jesse Taube wrote:
> 
> 
> On 11/15/22 14:32, Giulio Benetti wrote:
>> Cc: Jesse Taube <mr.bossman075@gmail.com>
>> Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
>> ---
>> V1->V2:
>> * nothing done
>> ---
>>   drivers/clk/imx/clk-imxrt1050.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/clk/imx/clk-imxrt1050.c 
>> b/drivers/clk/imx/clk-imxrt1050.c
>> index 26108e9f7e67..39f77c03b892 100644
>> --- a/drivers/clk/imx/clk-imxrt1050.c
>> +++ b/drivers/clk/imx/clk-imxrt1050.c
>> @@ -141,6 +141,7 @@ static int imxrt1050_clocks_probe(struct 
>> platform_device *pdev)
>>       hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", 
>> "usdhc2_podf", ccm_base + 0x80, 4);
>>       hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", 
>> "lpuart_podf", ccm_base + 0x7c, 24);
>>       hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", 
>> "lcdif_podf", ccm_base + 0x70, 28);
>> +    hws[IMXRT1050_CLK_LCDIF_PIX] = imx_clk_hw_gate2("lcdif_pix", 
>> "lcdif", ccm_base + 0x74, 10);
> I think it makes sense to squash this with PATCH1 because it changes the 
> same file. It also will make the change more understandable as I swapped 
> the offsets for PIX clock and APB clock accidentally. 

I would not squash them since on "Patch 1/4" fixes something, while
"Patch 2/4" adds something.

> I'm not sure if 
> this is necessary but I think there should be a commit description. 

You're right and same goes for all patches, I keep forgetting.

Sorry for the noise.

Thank you
Best regards
diff mbox series

Patch

diff --git a/drivers/clk/imx/clk-imxrt1050.c b/drivers/clk/imx/clk-imxrt1050.c
index 26108e9f7e67..39f77c03b892 100644
--- a/drivers/clk/imx/clk-imxrt1050.c
+++ b/drivers/clk/imx/clk-imxrt1050.c
@@ -141,6 +141,7 @@  static int imxrt1050_clocks_probe(struct platform_device *pdev)
 	hws[IMXRT1050_CLK_USDHC2] = imx_clk_hw_gate2("usdhc2", "usdhc2_podf", ccm_base + 0x80, 4);
 	hws[IMXRT1050_CLK_LPUART1] = imx_clk_hw_gate2("lpuart1", "lpuart_podf", ccm_base + 0x7c, 24);
 	hws[IMXRT1050_CLK_LCDIF_APB] = imx_clk_hw_gate2("lcdif", "lcdif_podf", ccm_base + 0x70, 28);
+	hws[IMXRT1050_CLK_LCDIF_PIX] = imx_clk_hw_gate2("lcdif_pix", "lcdif", ccm_base + 0x74, 10);
 	hws[IMXRT1050_CLK_DMA] = imx_clk_hw_gate("dma", "ipg", ccm_base + 0x7C, 6);
 	hws[IMXRT1050_CLK_DMA_MUX] = imx_clk_hw_gate("dmamux0", "ipg", ccm_base + 0x7C, 7);
 	imx_check_clk_hws(hws, IMXRT1050_CLK_END);