Message ID | 20221114233940.2096237-3-tanmay.shah@amd.com |
---|---|
State | New |
Headers |
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Series |
Add Xilinx RPU subsystem support
|
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Commit Message
Tanmay Shah
Nov. 14, 2022, 11:39 p.m. UTC
RPU subsystem can be configured in cluster-mode or split mode.
Also each r5 core has separate power domains.
Signed-off-by: Tanmay Shah <tanmay.shah@amd.com>
---
Changes in v11:
- None
Changes in v10:
- Rename node name to remoteproc
Changes in v9:
- remove unused labels
Changes in v8:
- None
Changes in v7:
- None
Changes in v6:
- None
Changes in v5:
- Remove optional reg property from r5fss node
- Move r5fss node out of axi node
Changes in v4:
- Add reserved memory region node and use it in RPU subsystem node
Changes in v3:
- Fix checkpatch.pl style warning
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 33 ++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
Comments
On 11/15/22 00:39, Tanmay Shah wrote: > RPU subsystem can be configured in cluster-mode or split mode. > Also each r5 core has separate power domains. > > Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> > --- > > Changes in v11: > - None > > Changes in v10: > - Rename node name to remoteproc > > Changes in v9: > - remove unused labels > > Changes in v8: > - None > > Changes in v7: > - None > > Changes in v6: > - None > > Changes in v5: > - Remove optional reg property from r5fss node > - Move r5fss node out of axi node > > Changes in v4: > - Add reserved memory region node and use it in RPU subsystem node > > Changes in v3: > - Fix checkpatch.pl style warning > > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 33 ++++++++++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > index a549265e55f6..c0f60833c0ae 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > @@ -100,6 +100,22 @@ opp03 { > }; > }; > > + reserved-memory { > + #address-cells = <2>; > + #size-cells = <2>; > + ranges; > + > + rproc_0_fw_image: memory@3ed00000 { > + no-map; > + reg = <0x0 0x3ed00000 0x0 0x40000>; > + }; > + > + rproc_1_fw_image: memory@3ef00000 { > + no-map; > + reg = <0x0 0x3ef00000 0x0 0x40000>; > + }; > + }; > + > zynqmp_ipi: zynqmp_ipi { > compatible = "xlnx,zynqmp-ipi-mailbox"; > interrupt-parent = <&gic>; > @@ -203,6 +219,23 @@ fpga_full: fpga-full { > ranges; > }; > > + remoteproc { > + compatible = "xlnx,zynqmp-r5fss"; > + xlnx,cluster-mode = <1>; > + > + r5f-0 { > + compatible = "xlnx,zynqmp-r5f"; > + power-domains = <&zynqmp_firmware PD_RPU_0>; > + memory-region = <&rproc_0_fw_image>; > + }; > + > + r5f-1 { > + compatible = "xlnx,zynqmp-r5f"; > + power-domains = <&zynqmp_firmware PD_RPU_1>; > + memory-region = <&rproc_1_fw_image>; > + }; > + }; > + > amba: axi { > compatible = "simple-bus"; > #address-cells = <2>; Matthieu: If you want to take this via your tree here is mine. Acked-by: Michal Simek <michal.simek@amd.com> In another case I will queue it for next release when dt binding is applied. Thanks, Michal
On Fri, Nov 25, 2022 at 10:22:47AM +0100, Michal Simek wrote: > > > On 11/15/22 00:39, Tanmay Shah wrote: > > RPU subsystem can be configured in cluster-mode or split mode. > > Also each r5 core has separate power domains. > > > > Signed-off-by: Tanmay Shah <tanmay.shah@amd.com> > > --- > > > > Changes in v11: > > - None > > > > Changes in v10: > > - Rename node name to remoteproc > > > > Changes in v9: > > - remove unused labels > > > > Changes in v8: > > - None > > > > Changes in v7: > > - None > > > > Changes in v6: > > - None > > > > Changes in v5: > > - Remove optional reg property from r5fss node > > - Move r5fss node out of axi node > > > > Changes in v4: > > - Add reserved memory region node and use it in RPU subsystem node > > > > Changes in v3: > > - Fix checkpatch.pl style warning > > > > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 33 ++++++++++++++++++++++++++ > > 1 file changed, 33 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > index a549265e55f6..c0f60833c0ae 100644 > > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > > @@ -100,6 +100,22 @@ opp03 { > > }; > > }; > > + reserved-memory { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + ranges; > > + > > + rproc_0_fw_image: memory@3ed00000 { > > + no-map; > > + reg = <0x0 0x3ed00000 0x0 0x40000>; > > + }; > > + > > + rproc_1_fw_image: memory@3ef00000 { > > + no-map; > > + reg = <0x0 0x3ef00000 0x0 0x40000>; > > + }; > > + }; > > + > > zynqmp_ipi: zynqmp_ipi { > > compatible = "xlnx,zynqmp-ipi-mailbox"; > > interrupt-parent = <&gic>; > > @@ -203,6 +219,23 @@ fpga_full: fpga-full { > > ranges; > > }; > > + remoteproc { > > + compatible = "xlnx,zynqmp-r5fss"; > > + xlnx,cluster-mode = <1>; > > + > > + r5f-0 { > > + compatible = "xlnx,zynqmp-r5f"; > > + power-domains = <&zynqmp_firmware PD_RPU_0>; > > + memory-region = <&rproc_0_fw_image>; > > + }; > > + > > + r5f-1 { > > + compatible = "xlnx,zynqmp-r5f"; > > + power-domains = <&zynqmp_firmware PD_RPU_1>; > > + memory-region = <&rproc_1_fw_image>; > > + }; > > + }; > > + > > amba: axi { > > compatible = "simple-bus"; > > #address-cells = <2>; > > Matthieu: If you want to take this via your tree here is mine. > > Acked-by: Michal Simek <michal.simek@amd.com> I have applied the whole set. Thanks, Mathieu > > In another case I will queue it for next release when dt binding is applied. > > Thanks, > Michal
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index a549265e55f6..c0f60833c0ae 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -100,6 +100,22 @@ opp03 { }; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + rproc_0_fw_image: memory@3ed00000 { + no-map; + reg = <0x0 0x3ed00000 0x0 0x40000>; + }; + + rproc_1_fw_image: memory@3ef00000 { + no-map; + reg = <0x0 0x3ef00000 0x0 0x40000>; + }; + }; + zynqmp_ipi: zynqmp_ipi { compatible = "xlnx,zynqmp-ipi-mailbox"; interrupt-parent = <&gic>; @@ -203,6 +219,23 @@ fpga_full: fpga-full { ranges; }; + remoteproc { + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <1>; + + r5f-0 { + compatible = "xlnx,zynqmp-r5f"; + power-domains = <&zynqmp_firmware PD_RPU_0>; + memory-region = <&rproc_0_fw_image>; + }; + + r5f-1 { + compatible = "xlnx,zynqmp-r5f"; + power-domains = <&zynqmp_firmware PD_RPU_1>; + memory-region = <&rproc_1_fw_image>; + }; + }; + amba: axi { compatible = "simple-bus"; #address-cells = <2>;