Message ID | 20221114115606.1967080-1-clabbe@baylibre.com |
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State | New |
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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id x10-20020adff64a000000b00236883f2f5csm9520658wrp.94.2022.11.14.03.56.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 03:56:18 -0800 (PST) From: Corentin Labbe <clabbe@baylibre.com> To: wsa@kernel.org, jdelvare@suse.de Cc: linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, Corentin Labbe <clabbe@baylibre.com> Subject: [PATCH v2] i2c: smbus: add DDR support for SPD Date: Mon, 14 Nov 2022 11:56:06 +0000 Message-Id: <20221114115606.1967080-1-clabbe@baylibre.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749473731797985594?= X-GMAIL-MSGID: =?utf-8?q?1749473731797985594?= |
Series |
[v2] i2c: smbus: add DDR support for SPD
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Commit Message
Corentin LABBE
Nov. 14, 2022, 11:56 a.m. UTC
On my x05 laptop I got:
Memory type 0x12 not supported yet, not instantiating SPD
Adding the 0x12 case lead to a successful instantiated SPD AT24 EEPROM.
i801_smbus 0000:00:1f.3: SMBus using polling
i2c i2c-6: 2/2 memory slots populated (from DMI)
at24 6-0050: 256 byte spd EEPROM, read-only
i2c i2c-6: Successfully instantiated SPD at 0x50
at24 6-0051: 256 byte spd EEPROM, read-only
And then, I decoded it successfully via decode-dimms.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
---
Changes since v1:
- Added memory type document link
- Added case for LPDDR
drivers/i2c/i2c-smbus.c | 6 ++++++
1 file changed, 6 insertions(+)
Comments
Hi Corentin, On Mon, 14 Nov 2022 11:56:06 +0000, Corentin Labbe wrote: > On my x05 laptop I got: > Memory type 0x12 not supported yet, not instantiating SPD > > Adding the 0x12 case lead to a successful instantiated SPD AT24 EEPROM. > i801_smbus 0000:00:1f.3: SMBus using polling > i2c i2c-6: 2/2 memory slots populated (from DMI) > at24 6-0050: 256 byte spd EEPROM, read-only > i2c i2c-6: Successfully instantiated SPD at 0x50 > at24 6-0051: 256 byte spd EEPROM, read-only > > And then, I decoded it successfully via decode-dimms. > > Signed-off-by: Corentin Labbe <clabbe@baylibre.com> > --- > Changes since v1: > - Added memory type document link > - Added case for LPDDR > > drivers/i2c/i2c-smbus.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c > index 07c92c8495a3..c85710ed9548 100644 > --- a/drivers/i2c/i2c-smbus.c > +++ b/drivers/i2c/i2c-smbus.c > @@ -361,9 +361,15 @@ void i2c_register_spd(struct i2c_adapter *adap) > return; > } > > + /* > + * Memory types could be found at section 7.18.2 (Memory Device — Type), table 78 > + * https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.6.0.pdf > + */ > switch (common_mem_type) { > + case 0x12: /* DDR */ > case 0x13: /* DDR2 */ > case 0x18: /* DDR3 */ > + case 0x1B: /* LPDDR */ > case 0x1C: /* LPDDR2 */ > case 0x1D: /* LPDDR3 */ > name = "spd"; Reviewed-by: Jean Delvare <jdelvare@suse.de> Thanks,
On Mon, Nov 14, 2022 at 11:56:06AM +0000, Corentin Labbe wrote: > On my x05 laptop I got: > Memory type 0x12 not supported yet, not instantiating SPD > > Adding the 0x12 case lead to a successful instantiated SPD AT24 EEPROM. > i801_smbus 0000:00:1f.3: SMBus using polling > i2c i2c-6: 2/2 memory slots populated (from DMI) > at24 6-0050: 256 byte spd EEPROM, read-only > i2c i2c-6: Successfully instantiated SPD at 0x50 > at24 6-0051: 256 byte spd EEPROM, read-only > > And then, I decoded it successfully via decode-dimms. > > Signed-off-by: Corentin Labbe <clabbe@baylibre.com> Applied to for-current, thanks!
diff --git a/drivers/i2c/i2c-smbus.c b/drivers/i2c/i2c-smbus.c index 07c92c8495a3..c85710ed9548 100644 --- a/drivers/i2c/i2c-smbus.c +++ b/drivers/i2c/i2c-smbus.c @@ -361,9 +361,15 @@ void i2c_register_spd(struct i2c_adapter *adap) return; } + /* + * Memory types could be found at section 7.18.2 (Memory Device — Type), table 78 + * https://www.dmtf.org/sites/default/files/standards/documents/DSP0134_3.6.0.pdf + */ switch (common_mem_type) { + case 0x12: /* DDR */ case 0x13: /* DDR2 */ case 0x18: /* DDR3 */ + case 0x1B: /* LPDDR */ case 0x1C: /* LPDDR2 */ case 0x1D: /* LPDDR3 */ name = "spd";