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[91.114.0.140]) by smtp.gmail.com with ESMTPSA id 26-20020a170906311a00b007ae693cd265sm3928068ejx.150.2022.11.14.01.40.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Nov 2022 01:40:09 -0800 (PST) From: Peter Suti To: Ulf Hansson , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Heiner Kallweit Cc: Peter Suti , linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] mmc: meson-gx: fix SDIO interrupt handling Date: Mon, 14 Nov 2022 10:38:57 +0100 Message-Id: <20221114093857.491695-1-peter.suti@streamunlimited.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749464611573751529?= X-GMAIL-MSGID: =?utf-8?q?1749464611573751529?= With the interrupt support introduced in commit 066ecde sometimes the Marvell-8987 wifi chip entered a deadlock using the marvell-sd-uapsta-8987 vendor driver. The cause seems to be that sometimes the interrupt handler handles 2 IRQs and one of them disables the interrupts which are not reenabled when all interrupts are finished. To work around this, disable all interrupts when we are in the IRQ context and reenable them when the current IRQ is handled. Fixes: 066ecde ("mmc: meson-gx: add SDIO interrupt support") Signed-off-by: Peter Suti --- drivers/mmc/host/meson-gx-mmc.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/drivers/mmc/host/meson-gx-mmc.c b/drivers/mmc/host/meson-gx-mmc.c index 6e5ea0213b47..972024d57d1c 100644 --- a/drivers/mmc/host/meson-gx-mmc.c +++ b/drivers/mmc/host/meson-gx-mmc.c @@ -950,6 +950,10 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) struct mmc_command *cmd; u32 status, raw_status; irqreturn_t ret = IRQ_NONE; + unsigned long flags; + + spin_lock_irqsave(&host->lock, flags); + __meson_mmc_enable_sdio_irq(host->mmc, 0); raw_status = readl(host->regs + SD_EMMC_STATUS); status = raw_status & (IRQ_EN_MASK | IRQ_SDIO); @@ -958,11 +962,11 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) dev_dbg(host->dev, "Unexpected IRQ! irq_en 0x%08lx - status 0x%08x\n", IRQ_EN_MASK | IRQ_SDIO, raw_status); - return IRQ_NONE; + goto out_unlock; } if (WARN_ON(!host)) - return IRQ_NONE; + goto out_unlock; /* ack all raised interrupts */ writel(status, host->regs + SD_EMMC_STATUS); @@ -970,17 +974,16 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) cmd = host->cmd; if (status & IRQ_SDIO) { - spin_lock(&host->lock); - __meson_mmc_enable_sdio_irq(host->mmc, 0); sdio_signal_irq(host->mmc); - spin_unlock(&host->lock); status &= ~IRQ_SDIO; - if (!status) + if (!status) { + spin_unlock_irqrestore(&host->lock, flags); return IRQ_HANDLED; + } } if (WARN_ON(!cmd)) - return IRQ_NONE; + goto out_unlock; cmd->error = 0; if (status & IRQ_CRC_ERR) { @@ -1023,6 +1026,10 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id) if (ret == IRQ_HANDLED) meson_mmc_request_done(host->mmc, cmd->mrq); +out_unlock: + __meson_mmc_enable_sdio_irq(host->mmc, 1); + spin_unlock_irqrestore(&host->lock, flags); + return ret; }