Message ID | 20221112151835.39059-16-aidanmacdonald.0x0@gmail.com |
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State | New |
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[94.197.38.186]) by smtp.gmail.com with ESMTPSA id g11-20020a5d540b000000b0022cdeba3f83sm4567636wrv.84.2022.11.12.07.19.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Nov 2022 07:19:50 -0800 (PST) From: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> To: lee@kernel.org Cc: mani@kernel.org, cristian.ciocaltea@gmail.com, wens@csie.org, tharvey@gateworks.com, cw00.choi@samsung.com, krzysztof.kozlowski@linaro.org, brgl@bgdev.pl, mazziesaccount@gmail.com, orsonzhai@gmail.com, baolin.wang@linux.alibaba.com, zhang.lyra@gmail.com, jernej.skrabec@gmail.com, samuel@sholland.org, linux-kernel@vger.kernel.org, linux-actions@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: [PATCH 15/18] mfd: stpmic1: Fix swapped mask/unmask in irq chip Date: Sat, 12 Nov 2022 15:18:32 +0000 Message-Id: <20221112151835.39059-16-aidanmacdonald.0x0@gmail.com> In-Reply-To: <20221112151835.39059-1-aidanmacdonald.0x0@gmail.com> References: <20221112151835.39059-1-aidanmacdonald.0x0@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FROM,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749305224794878311?= X-GMAIL-MSGID: =?utf-8?q?1749305224794878311?= |
Series |
mfd: Clean up deprecated regmap-irq functionality
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Commit Message
Aidan MacDonald
Nov. 12, 2022, 3:18 p.m. UTC
The usual behavior of mask registers is writing a '1' bit to
disable (mask) an interrupt; similarly, writing a '1' bit to
an unmask register enables (unmasks) an interrupt.
Due to a longstanding issue in regmap-irq, mask and unmask
registers were inverted when both kinds of registers were
present on the same chip, ie. regmap-irq actually wrote '1's
to the mask register to enable an IRQ and '1's to the unmask
register to disable an IRQ.
This was fixed by commit e8ffb12e7f06 ("regmap-irq: Fix
inverted handling of unmask registers") but the fix is opt-in
via mask_unmask_non_inverted = true because it requires manual
changes for each affected driver. The new behavior will become
the default once all drivers have been updated.
The STPMIC1 has a normal mask register with separate set and
clear registers. The driver intends to use the set & clear
registers with regmap-irq and has compensated for regmap-irq's
inverted behavior, and should currently be working properly.
Thus, swap mask_base and unmask_base, and opt in to the new
non-inverted behavior.
Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
---
drivers/mfd/stpmic1.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
Comments
On Sat, 12 Nov 2022, Aidan MacDonald wrote: > The usual behavior of mask registers is writing a '1' bit to > disable (mask) an interrupt; similarly, writing a '1' bit to > an unmask register enables (unmasks) an interrupt. > > Due to a longstanding issue in regmap-irq, mask and unmask > registers were inverted when both kinds of registers were > present on the same chip, ie. regmap-irq actually wrote '1's > to the mask register to enable an IRQ and '1's to the unmask > register to disable an IRQ. > > This was fixed by commit e8ffb12e7f06 ("regmap-irq: Fix > inverted handling of unmask registers") but the fix is opt-in > via mask_unmask_non_inverted = true because it requires manual > changes for each affected driver. The new behavior will become > the default once all drivers have been updated. > > The STPMIC1 has a normal mask register with separate set and > clear registers. The driver intends to use the set & clear > registers with regmap-irq and has compensated for regmap-irq's > inverted behavior, and should currently be working properly. > Thus, swap mask_base and unmask_base, and opt in to the new > non-inverted behavior. > > Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> > --- > drivers/mfd/stpmic1.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) Applied, thanks.
diff --git a/drivers/mfd/stpmic1.c b/drivers/mfd/stpmic1.c index eb3da558c3fb..ee0469d5d435 100644 --- a/drivers/mfd/stpmic1.c +++ b/drivers/mfd/stpmic1.c @@ -108,8 +108,9 @@ static const struct regmap_irq stpmic1_irqs[] = { static const struct regmap_irq_chip stpmic1_regmap_irq_chip = { .name = "pmic_irq", .status_base = INT_PENDING_R1, - .mask_base = INT_CLEAR_MASK_R1, - .unmask_base = INT_SET_MASK_R1, + .mask_base = INT_SET_MASK_R1, + .unmask_base = INT_CLEAR_MASK_R1, + .mask_unmask_non_inverted = true, .ack_base = INT_CLEAR_R1, .num_regs = STPMIC1_PMIC_NUM_IRQ_REGS, .irqs = stpmic1_irqs,