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[2620:137:e000::1:20]) by mx.google.com with ESMTP id s17-20020aa7c551000000b00462c7bbc03esi16267460edr.114.2022.11.10.07.46.59; Thu, 10 Nov 2022 07:47:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=3QoRxOAq; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231679AbiKJPqo (ORCPT + 99 others); Thu, 10 Nov 2022 10:46:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231646AbiKJPql (ORCPT ); Thu, 10 Nov 2022 10:46:41 -0500 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F38DD2CDCF for ; Thu, 10 Nov 2022 07:46:39 -0800 (PST) Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2AAFbsNB011752; Thu, 10 Nov 2022 16:46:22 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=selector1; bh=Dqy9dYHsxt9AzTmF5WyUZLFE2yygm9hJF+Zgo8L1RJY=; b=3QoRxOAqokFH7cqxQ7p2j3qdCaQoq3PrlYExjHyn0x8lDlyE04KafHpVBq0zGaeKs2yl xUlf2FSGJO5XqP73atdvgQxtDcQkDHPY74BH/ITUEdoKc9FsT9L5Z+EzCoXwsnhEN5Zb ebJnv+XutgPZzzYNzLXOQomXAuUSVcgtgq2mArGoq8RcyM7vc7pkrFdLQdVUqodo/SNO v6k6I8pNAAqV9CqxnmK2INuIMZWKVzLwyzWozdu1MWWKWjiv+bbKIWQMFKocARdLgVid ulNPy+nBabNz4Of8pABkt5HwU/S4oqdqWa9l9CkRxb/lkeulSw+J48eo08Pfa/DuzRgN qA== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3ks443g1t1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 10 Nov 2022 16:46:22 +0100 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 960A710002A; Thu, 10 Nov 2022 16:46:17 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node3.st.com [10.75.129.71]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 8F93422AFED; Thu, 10 Nov 2022 16:46:17 +0100 (CET) Received: from localhost (10.252.15.206) by SHFDAG1NODE3.st.com (10.75.129.71) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.32; Thu, 10 Nov 2022 16:46:16 +0100 From: Patrick Delaunay To: Alexandre TORGUE , Srinivas Kandagatla , Maxime Coquelin CC: Fabrice GASNIER , Patrick Delaunay , , , Subject: [PATCH v2 3/3] nvmem: stm32: detect bsec pta presence for STM32MP15x Date: Thu, 10 Nov 2022 16:45:49 +0100 Message-ID: <20221110164329.v2.3.I59210046e368cfc22bd3cca2afe1653674f8ece8@changeid> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221110154550.3220800-1-patrick.delaunay@foss.st.com> References: <20221110154550.3220800-1-patrick.delaunay@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.252.15.206] X-ClientProxiedBy: EQNCAS1NODE3.st.com (10.75.129.80) To SHFDAG1NODE3.st.com (10.75.129.71) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-10_10,2022-11-09_01,2022-06-22_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749124637524162763?= X-GMAIL-MSGID: =?utf-8?q?1749124637524162763?= On STM32MP15x SoC, the SMC backend is optional when OP-TEE is used; the PTA BSEC should be used as it is done on STM32MP13x platform, but the BSEC SMC can be also used: it is a legacy mode in OP-TEE, not recommended but used in previous OP-TEE firmware. The presence of OP-TEE is dynamically detected in STM32MP15x device tree and the supported NVMEM backend is dynamically detected: - PTA with stm32_bsec_pta_find - SMC with stm32_bsec_check With OP-TEE but without PTA and SMC detection, the probe is deferred for STM32MP15x devices. On STM32MP13x platform, only the PTA is supported with cfg->ta = true and this detection is skipped. Signed-off-by: Patrick Delaunay --- Changes in v2: - Added patch in the serie for BSEC PTA support on STM32MP15x with dynamic detection of OP-TEE presence and SMC support (legacy mode) drivers/nvmem/stm32-romem.c | 37 +++++++++++++++++++++++++++++++++---- 1 file changed, 33 insertions(+), 4 deletions(-) diff --git a/drivers/nvmem/stm32-romem.c b/drivers/nvmem/stm32-romem.c index 0a0e29d09b67..35997d581c9d 100644 --- a/drivers/nvmem/stm32-romem.c +++ b/drivers/nvmem/stm32-romem.c @@ -526,6 +526,31 @@ static int stm32_bsec_write(void *context, unsigned int offset, void *buf, return 0; } +static bool stm32_bsec_smc_check(void) +{ + u32 val; + int ret; + + /* check that the OP-TEE support the BSEC SMC (legacy mode) */ + ret = stm32_bsec_smc(STM32_SMC_READ_SHADOW, 0, 0, &val); + + return !ret; +} + +static bool optee_presence_check(void) +{ + struct device_node *np; + bool tee_detected = false; + + /* check that the OP-TEE node is present and available. */ + np = of_find_node_by_path("/firmware/optee"); + if (np && of_device_is_available(np)) + tee_detected = true; + of_node_put(np); + + return tee_detected; +} + static int stm32_romem_probe(struct platform_device *pdev) { const struct stm32_romem_cfg *cfg; @@ -561,14 +586,18 @@ static int stm32_romem_probe(struct platform_device *pdev) } else { priv->cfg.size = cfg->size; priv->lower = cfg->lower; - if (cfg->ta) { + if (cfg->ta || optee_presence_check()) { priv->ta = stm32_bsec_pta_find(dev); /* wait for OP-TEE client driver to be up and ready */ - if (!priv->ta) - return -EPROBE_DEFER; + if (!priv->ta) { + /* BSEC PTA is required or SMC not ready */ + if (cfg->ta || !stm32_bsec_smc_check()) + return -EPROBE_DEFER; + } if (IS_ERR(priv->ta)) return PTR_ERR(priv->ta); - + } + if (priv->ta) { priv->cfg.reg_read = stm32_bsec_pta_read; priv->cfg.reg_write = stm32_bsec_pta_write; } else {