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([46.183.103.8]) by smtp.gmail.com with ESMTPSA id fd25-20020a056402389900b0045b910b0542sm8555466edb.15.2022.11.10.07.15.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 10 Nov 2022 07:16:16 -0800 (PST) From: Luca Weiss To: linux-arm-msm@vger.kernel.org Cc: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Luca Weiss , Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] arm64: dts: qcom: sm7225-fairphone-fp4: Enable SD card Date: Thu, 10 Nov 2022 16:15:06 +0100 Message-Id: <20221110151507.53650-1-luca.weiss@fairphone.com> X-Mailer: git-send-email 2.38.1 MIME-Version: 1.0 X-Spam-Status: No, score=1.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Level: * X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749122804125665923?= X-GMAIL-MSGID: =?utf-8?q?1749122804125665923?= Fairphone 4 uses sdhc_2 for the SD card, configure the pins for it and enable it. The regulators which are exclusively used for SDHCI have their maximum voltage decreased to what downstream sets on the consumer side, like on many other platforms and allowed to set the load. Signed-off-by: Luca Weiss Reviewed-by: Konrad Dybcio --- .../boot/dts/qcom/sm7225-fairphone-fp4.dts | 39 ++++++++++++++++++- 1 file changed, 37 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts index 30c94fd4fe61..1cb14051ab1b 100644 --- a/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts +++ b/arch/arm64/boot/dts/qcom/sm7225-fairphone-fp4.dts @@ -279,8 +279,12 @@ vreg_l5e: ldo5 { vreg_l6e: ldo6 { regulator-min-microvolt = <1700000>; - regulator-max-microvolt = <3544000>; + regulator-max-microvolt = <2950000>; regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = + ; }; vreg_l7e: ldo7 { @@ -297,8 +301,12 @@ vreg_l8e: ldo8 { vreg_l9e: ldo9 { regulator-min-microvolt = <2700000>; - regulator-max-microvolt = <3544000>; + regulator-max-microvolt = <2960000>; regulator-initial-mode = ; + regulator-allow-set-load; + regulator-allowed-modes = + ; }; vreg_l10e: ldo10 { @@ -424,6 +432,33 @@ &qupv3_id_1 { status = "okay"; }; +&sdc2_off_state { + sd-cd-pins { + pins = "gpio94"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; +}; + +&sdc2_on_state { + sd-cd-pins { + pins = "gpio94"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; +}; + +&sdhc_2 { + vmmc-supply = <&vreg_l9e>; + vqmmc-supply = <&vreg_l6e>; + + cd-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; + + status = "okay"; +}; + &tlmm { gpio-reserved-ranges = <13 4>, <56 2>; };