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[2620:137:e000::1:20]) by mx.google.com with ESMTP id s4-20020a170903214400b00186b766d4a0si16146663ple.325.2022.11.10.02.38.30; Thu, 10 Nov 2022 02:38:45 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=bFNGnxsl; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230082AbiKJK27 (ORCPT + 99 others); Thu, 10 Nov 2022 05:28:59 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56514 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229547AbiKJK24 (ORCPT ); Thu, 10 Nov 2022 05:28:56 -0500 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C930D2AC48; Thu, 10 Nov 2022 02:28:54 -0800 (PST) X-UUID: d5c43597dde14b9db65cc31ced97b4f0-20221110 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=L0Ez5CO8feEkornp6QsB0akR30tYyS30jCTuChE+g3k=; b=bFNGnxslF6N5+Ac9kn+KoR8ionot5zHy82/3vY9e00BuS1ORUi6OYzlbMJnzyxmzHNymtkxInFrM1USnKdoTSa/DbwwPU2OvSfbxhvO+f/w3XRLhFvqxQkc4UGviuOPPgw64Rp7LW+JnpVnApJ0kOqcKJfbc3CblparohhY85T0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.12,REQID:610000b0-f68c-4a1a-80ba-dc90aa52d79b,IP:0,U RL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION: release,TS:0 X-CID-META: VersionHash:62cd327,CLOUDID:7e692e5d-100c-4555-952b-a62c895efded,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: d5c43597dde14b9db65cc31ced97b4f0-20221110 Received: from mtkmbs13n2.mediatek.inc [(172.21.101.108)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 337955234; Thu, 10 Nov 2022 18:28:51 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs13n2.mediatek.inc (172.21.101.108) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 10 Nov 2022 18:28:49 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 10 Nov 2022 18:28:43 +0800 From: Yunfei Dong To: Yunfei Dong , Rob Herring , Chen-Yu Tsai , Hans Verkuil , AngeloGioacchino Del Regno , Benjamin Gaignard , Tiffany Lin CC: Mauro Carvalho Chehab , Matthias Brugger , Hsin-Yi Wang , Daniel Vetter , Steve Cho , , , , , , Subject: [PATCH v2,2/3] media: dt-bindings: media: mediatek: vcodec: Adding racing control register base Date: Thu, 10 Nov 2022 18:28:33 +0800 Message-ID: <20221110102834.8946-2-yunfei.dong@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221110102834.8946-1-yunfei.dong@mediatek.com> References: <20221110102834.8946-1-yunfei.dong@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-getmail-retrieved-from-mailbox: =?utf-8?q?INBOX?= X-GMAIL-THRID: =?utf-8?q?1749105220107124519?= X-GMAIL-MSGID: =?utf-8?q?1749105220107124519?= Need to add racing control register base in device node for mt8195 support inner racing mode. Removing 'maxItems' and adding 'minItems'. Adding description for each reg. Signed-off-by: Yunfei Dong Reviewed-by: Rob Herring --- compared with v1: - add description for 'VDEC_SYS' - add description for 'VDEC_RACING_CTRL' - add description for 'VDEC_MISC' - change maxItems -> minItems according to AngeloGioacchino's suggestion - Fix dt_binding_check fail --- .../bindings/media/mediatek,vcodec-subdev-decoder.yaml | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml index 794012853834..9af58db294d3 100644 --- a/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml +++ b/Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml @@ -61,7 +61,10 @@ properties: - mediatek,mt8195-vcodec-dec reg: - maxItems: 1 + minItems: 1 + items: + - description: VDEC_SYS register space + - description: VDEC_RACING_CTRL register space iommus: minItems: 1 @@ -115,6 +118,7 @@ patternProperties: reg: maxItems: 1 + description: VDEC_MISC register space iommus: minItems: 1 @@ -154,6 +158,7 @@ patternProperties: reg: maxItems: 1 + description: VDEC_MISC register space interrupts: maxItems: 1 @@ -195,6 +200,7 @@ patternProperties: reg: maxItems: 1 + description: VDEC_MISC register space interrupts: maxItems: 1