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Received: from AS8PR04MB8404.eurprd04.prod.outlook.com (2603:10a6:20b:3f8::7) by AS8PR04MB8916.eurprd04.prod.outlook.com (2603:10a6:20b:42f::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5791.24; Thu, 10 Nov 2022 08:19:26 +0000 Received: from AS8PR04MB8404.eurprd04.prod.outlook.com ([fe80::71f1:f7bb:5039:e55d]) by AS8PR04MB8404.eurprd04.prod.outlook.com ([fe80::71f1:f7bb:5039:e55d%3]) with mapi id 15.20.5791.027; Thu, 10 Nov 2022 08:19:26 +0000 From: Sherry Sun To: gregkh@linuxfoundation.org, jirislaby@kernel.org Cc: michael@walle.cc, jingchang.lu@freescale.com, tomonori.sakita@sord.co.jp, atsushi.nemoto@sord.co.jp, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, linux-imx@nxp.com Subject: [PATCH V2 1/5] tty: serial: fsl_lpuart: only enable Idle Line Interrupt for non-dma case Date: Thu, 10 Nov 2022 16:17:24 +0800 Message-Id: <20221110081728.10172-2-sherry.sun@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221110081728.10172-1-sherry.sun@nxp.com> References: <20221110081728.10172-1-sherry.sun@nxp.com> X-ClientProxiedBy: SI2PR02CA0022.apcprd02.prod.outlook.com (2603:1096:4:195::23) To AS8PR04MB8404.eurprd04.prod.outlook.com (2603:10a6:20b:3f8::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS8PR04MB8404:EE_|AS8PR04MB8916:EE_ X-MS-Office365-Filtering-Correlation-Id: 25ea8836-57b0-4aa9-b7b6-08dac2f4478a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Also need to configure the suitable UARTCTRL_IDLECFG, now the value is 0x7, represent 128 idle characters will trigger the Idle Line Interrupt. Signed-off-by: Sherry Sun --- Changes in V2: 1. Use FIELD_PREP() and GENMASK() for easy access to UARTCTRL_IDLECFG fields as suggested by Ilpo. --- drivers/tty/serial/fsl_lpuart.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index bd685491eead..a8f8e535077a 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -179,7 +179,7 @@ #define UARTCTRL_SBK 0x00010000 #define UARTCTRL_MA1IE 0x00008000 #define UARTCTRL_MA2IE 0x00004000 -#define UARTCTRL_IDLECFG 0x00000100 +#define UARTCTRL_IDLECFG GENMASK(10, 8) #define UARTCTRL_LOOPS 0x00000080 #define UARTCTRL_DOZEEN 0x00000040 #define UARTCTRL_RSRC 0x00000020 @@ -1506,7 +1506,7 @@ static void lpuart32_setup_watermark(struct lpuart_port *sport) ctrl = lpuart32_read(&sport->port, UARTCTRL); ctrl_saved = ctrl; ctrl &= ~(UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_TE | - UARTCTRL_RIE | UARTCTRL_RE); + UARTCTRL_RIE | UARTCTRL_RE | UARTCTRL_ILIE); lpuart32_write(&sport->port, ctrl, UARTCTRL); /* enable FIFO mode */ @@ -1530,7 +1530,8 @@ static void lpuart32_setup_watermark_enable(struct lpuart_port *sport) lpuart32_setup_watermark(sport); temp = lpuart32_read(&sport->port, UARTCTRL); - temp |= UARTCTRL_RE | UARTCTRL_TE | UARTCTRL_ILIE; + temp |= UARTCTRL_RE | UARTCTRL_TE; + temp |= FIELD_PREP(UARTCTRL_IDLECFG, 0x7); lpuart32_write(&sport->port, temp, UARTCTRL); } @@ -1669,7 +1670,7 @@ static void lpuart32_configure(struct lpuart_port *sport) } temp = lpuart32_read(&sport->port, UARTCTRL); if (!sport->lpuart_dma_rx_use) - temp |= UARTCTRL_RIE; + temp |= UARTCTRL_RIE | UARTCTRL_ILIE; if (!sport->lpuart_dma_tx_use) temp |= UARTCTRL_TIE; lpuart32_write(&sport->port, temp, UARTCTRL); @@ -1770,7 +1771,7 @@ static void lpuart32_shutdown(struct uart_port *port) /* disable Rx/Tx and interrupts */ temp = lpuart32_read(port, UARTCTRL); - temp &= ~(UARTCTRL_TE | UARTCTRL_RE | + temp &= ~(UARTCTRL_TE | UARTCTRL_RE | UARTCTRL_ILIE | UARTCTRL_TIE | UARTCTRL_TCIE | UARTCTRL_RIE); lpuart32_write(port, temp, UARTCTRL);